[PATCH] D157991: [RISCVInsertVSETVLI] Handle scalar extract (vmv.x.s, and vmx.f.s)

[Philip Reames via Phabricator via llvm-commits]

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vmv.x.s and vmv.f.s are unconditional.  They read the low element of a vector register (not vector group), and function even when VL=0 or VSTART>0.  As such, they are don't care with respect to both VL and LMUL.  (And also policy, but that should already be handled generically.)

We apparently never added these.  As can be seen in the test diffs, these mostly show up when exploding a vector into a set of scalars.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D157991

Files:
  llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-masked-scatter.ll

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