[PATCH] D157972: [DAG] SimplifyDemandedBits - add sra(shl(x,c1),c1) -> sign_extend_inreg(x) demanded elts fold

[Phoebe Wang via Phabricator via llvm-commits]

pengfei added inline comments.


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Comment at: llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp:1948
 
+      // fold (sra (shl x, c1), c1) -> sext_inreg for some c1 and target
+      // supports sext_inreg.
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Did we check the constant `c1` some where?


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https://reviews.llvm.org/D157972