[PATCH] D157373: [RISCV] add a compress optimization for stack inst.

lcvon via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Aug 14 21:03:54 PDT 2023


lcvon007 added inline comments.


================
Comment at: llvm/test/CodeGen/RISCV/stack-inst-compress.mir:13
+  entry:
+    %arr = alloca [517 x i32], align 4
+    call void @llvm.memset.p0.i64(ptr align 4 %arr, i8 0, i64 2068, i1 false)
----------------
wangpc wrote:
> Nit: the LLVM IR in a MIR test can be just function stub, the function body can be removed.
Do you mean I only provide only a decalare  here? , like:
declare dso_local void @_Z18caller_small_stackv(), and the compiler will report error "basic block 'entry' is not defined in the function '_Z18caller_small_stackv'", so   
 does it need other change too or keep the body here as now?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D157373/new/

https://reviews.llvm.org/D157373



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