[PATCH] D151414: [RISCV] Add Zvfhmin extension support for llvm RISCV backend.

Mon Aug 14 19:31:01 PDT 2023

jacquesguan added a comment.

In D151414#4585812 <https://reviews.llvm.org/D151414#4585812>, @michaelmaitland wrote:

> I think that this patch and https://reviews.llvm.org/D153848 need to be committed at the same time. This will ensure that if the zvfhmin option is enabled, then we can codegen all LLVM IR.
>
> I applied this patch and https://reviews.llvm.org/D153848, and then updated all instances of +zvfh to be +zvfhmin and re-ran the update_llc_test script for all of the files that were impacted. I found the following crash:
>
>   llvm/utils/update_llc_test_checks.py --llc-binary=build/bin/llc llvm/test/CodeGen/RISCV/regalloc-last-chance-recoloring-failure.ll
>   LLVM ERROR: Cannot select: intrinsic %llvm.riscv.vfwsub.w
>   PLEASE submit a bug report to https://github.com/llvm/llvm-project/issues/ and include the crash backtrace.
>   Stack dump:
>   0.      Program arguments: build/bin/llc -mtriple=riscv64 -mattr=+f,+m,+zfh,+zvfhmin -riscv-enable-subreg-liveness=false
>   1.      Running pass 'Function Pass Manager' on module '<stdin>'.
>   2.      Running pass 'RISC-V DAG->DAG Pattern Instruction Selection' on function '@last_chance_recoloring_failure'
>    #0 0x000000000178f197 llvm::sys::PrintStackTrace(llvm::raw_ostream&, int) (build/bin/llc+0x178f197)
>    #1 0x000000000178cebe llvm::sys::RunSignalHandlers() (build/bin/llc+0x178cebe)
>    #2 0x000000000178f9af SignalHandler(int) Signals.cpp:0:0
>    #3 0x00007f612c0b6cf0 __restore_rt (/lib64/libpthread.so.0+0x12cf0)
>    #4 0x00007f612ab2aaff raise (/lib64/libc.so.6+0x4eaff)
>    #5 0x00007f612aafdea5 abort (/lib64/libc.so.6+0x21ea5)
>    #6 0x000000000170cad3 llvm::report_fatal_error(llvm::Twine const&, bool) (build/bin/llc+0x170cad3)
>    #7 0x00000000015b1e3d llvm::SelectionDAGISel::CannotYetSelect(llvm::SDNode*) (build/bin/llc+0x15b1e3d)
>    #8 0x00000000015b0cfb llvm::SelectionDAGISel::SelectCodeCommon(llvm::SDNode*, unsigned char const*, unsigned int) (build/bin/llc+0x15b0cfb)
>    #9 0x000000000072465f llvm::RISCVDAGToDAGISel::Select(llvm::SDNode*) (build/bin/llc+0x72465f)
>   #10 0x00000000015a60f5 llvm::SelectionDAGISel::DoInstructionSelection() (build/bin/llc+0x15a60f5)
>   #11 0x00000000015a4fe2 llvm::SelectionDAGISel::CodeGenAndEmitDAG() (build/bin/llc+0x15a4fe2)
>   #12 0x00000000015a2b71 llvm::SelectionDAGISel::SelectAllBasicBlocks(llvm::Function const&) (build/bin/llc+0x15a2b71)
>   #13 0x000000000159f69c llvm::SelectionDAGISel::runOnMachineFunction(llvm::MachineFunction&) (build/bin/llc+0x159f69c)
>   #14 0x0000000000be8e2c llvm::MachineFunctionPass::runOnFunction(llvm::Function&) (build/bin/llc+0xbe8e2c)
>   #15 0x0000000001102e23 llvm::FPPassManager::runOnFunction(llvm::Function&) (build/bin/llc+0x1102e23)
>   #16 0x000000000110aaa1 llvm::FPPassManager::runOnModule(llvm::Module&) (build/bin/llc+0x110aaa1)
>   #17 0x0000000001103626 llvm::legacy::PassManagerImpl::run(llvm::Module&) (build/bin/llc+0x1103626)
>   #18 0x00000000006987e8 compileModule(char**, llvm::LLVMContext&) llc.cpp:0:0
>   #19 0x00000000006962bd main (build/bin/llc+0x6962bd)
>   #20 0x00007f612ab16d85 __libc_start_main (/lib64/libc.so.6+0x3ad85)
>   #21 0x0000000000692c6e _start (build/bin/llc+0x692c6e)
>
> I think we need to be able to update this patch or the type promotion patch to make sure we don't get any crashes like this when we run the experiment I describe above.

Yes, I agree with merging these patches at the same time.

But for the case `regalloc-last-chance-recoloring-failure.ll`, it uses the intirinsic `@llvm.riscv.vfwsub.w.nxv16f32.nxv16f16.i64`, this intrinsic is not supported in zvfhmin, so cannot selected is the excepted action. By example we also cannot select `@llvm.riscv.vmulh.nxv1i64.i64` for ZVE64D, and any vector intrinsic for no V enable. I don't  think we should do promotion for intrinsic too.
Actually target specific intrinsics basiclly comes from clang rvv-builtin. In https://reviews.llvm.org/D150253, any use of unsuportted builtin would cause a clang error. So there is no actual case will generate unsupportted intrinsic.

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D151414/new/

https://reviews.llvm.org/D151414