[PATCH] D157819: [RISCV][GISel] Make G_SELECT of pointers legal
Jessica Clarke via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Aug 14 12:01:07 PDT 2023
jrtc27 added inline comments.
================
Comment at: llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp:98
.widenScalarToNextPow2(0)
.clampScalar(0, XLenLLT, XLenLLT)
.clampScalar(1, XLenLLT, XLenLLT);
----------------
arsenm wrote:
> craig.topper wrote:
> > arsenm wrote:
> > > might want to add something like legalIf(isPointer(0)) to cover all the address spaces
> > Is AMDGPU the only target that uses multiple address spaces in GlobalISel today? I only see p0 in AArch64 for example.
> Probably. I know code in the wild is relying on the non-0 address spaces implicitly treated as 0 in SelectionDAG on x86
We use non-zero downstream for CHERI capabilities
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D157819/new/
https://reviews.llvm.org/D157819
More information about the llvm-commits
mailing list