[PATCH] D157633: [MachineScheduler] Account for lane masks in basic block liveins

[Jay Foad via Phabricator via llvm-commits]

foad added inline comments.


================
Comment at: llvm/lib/CodeGen/ScheduleDAGInstrs.cpp:228-229
+          auto [Unit, Mask] = *U;
+          if (Mask.none())
+            Mask = LaneBitmask::getAll();
+          if ((Mask & LI.LaneMask).any() && !Uses.contains(Unit))
----------------
foad wrote:
> arsenm wrote:
> > foad wrote:
> > > This seems to be some weird special case in the generated LaneMaskLists for registers with a single regunit. Or something.
> > the none is just broken, it should emit all
> Yeah, that was the first thing I tried changing, but it seemed to break a whole load of other tests and I didn't have time to investigate.
I got it working: D157864


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D157633/new/

https://reviews.llvm.org/D157633