[llvm] 9427238 - [AVR][NFC] Remove unused instruction classes
Ben Shi via llvm-commits
llvm-commits at lists.llvm.org
Sun Aug 13 23:24:48 PDT 2023
Author: Ben Shi
Date: 2023-08-14T14:24:10+08:00
New Revision: 94272389a0a9161ef71cab136c058bf306da2065
URL: https://github.com/llvm/llvm-project/commit/94272389a0a9161ef71cab136c058bf306da2065
DIFF: https://github.com/llvm/llvm-project/commit/94272389a0a9161ef71cab136c058bf306da2065.diff
LOG: [AVR][NFC] Remove unused instruction classes
Reviewed By: jacquesguan
Differential Revision: https://reviews.llvm.org/D157831
Added:
Modified:
llvm/lib/Target/AVR/AVRInstrFormats.td
Removed:
################################################################################
diff --git a/llvm/lib/Target/AVR/AVRInstrFormats.td b/llvm/lib/Target/AVR/AVRInstrFormats.td
index 653c7276ba7f0d..06d14a2fb47fec 100644
--- a/llvm/lib/Target/AVR/AVRInstrFormats.td
+++ b/llvm/lib/Target/AVR/AVRInstrFormats.td
@@ -75,17 +75,6 @@ class FRdRr<bits<4> opcode, bits<2> f, dag outs, dag ins, string asmstr,
let Inst{3 - 0} = rr{3 - 0};
}
-class FTST<bits<4> opcode, bits<2> f, dag outs, dag ins, string asmstr,
- list<dag> pattern> : AVRInst16<outs, ins, asmstr, pattern> {
- bits<5> rd;
-
- let Inst{15 - 12} = opcode;
- let Inst{11 - 10} = f;
- let Inst{9} = rd{4};
- let Inst{8 - 4} = rd;
- let Inst{3 - 0} = rd{3 - 0};
-}
-
//===----------------------------------------------------------------------===//
// Instruction of the format `<mnemonic> Z, Rd`
// <|1001|001r|rrrr|0ttt>
@@ -445,11 +434,6 @@ class F16<bits<16> opcode, dag outs, dag ins, string asmstr, list<dag> pattern>
let Inst = opcode;
}
-class F32<bits<32> opcode, dag outs, dag ins, string asmstr, list<dag> pattern>
- : AVRInst32<outs, ins, asmstr, pattern> {
- let Inst = opcode;
-}
-
//===----------------------------------------------------------------------===//
// Branching instructions with immediate12: <|110f|kkkk|kkkk|kkkk|>
// f = secondary opcode = 1 bit
More information about the llvm-commits
mailing list