[PATCH] D157831: [AVR][NFC] Remove unused instruction classes
Ben Shi via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Sun Aug 13 20:48:05 PDT 2023
benshi001 created this revision.
benshi001 added reviewers: aykevl, jacquesguan.
Herald added subscribers: Jim, hiraditya, dylanmckay.
Herald added a project: All.
benshi001 requested review of this revision.
Herald added a project: LLVM.
Herald added a subscriber: llvm-commits.
Repository:
rG LLVM Github Monorepo
https://reviews.llvm.org/D157831
Files:
llvm/lib/Target/AVR/AVRInstrFormats.td
Index: llvm/lib/Target/AVR/AVRInstrFormats.td
===================================================================
--- llvm/lib/Target/AVR/AVRInstrFormats.td
+++ llvm/lib/Target/AVR/AVRInstrFormats.td
@@ -75,17 +75,6 @@
let Inst{3 - 0} = rr{3 - 0};
}
-class FTST<bits<4> opcode, bits<2> f, dag outs, dag ins, string asmstr,
- list<dag> pattern> : AVRInst16<outs, ins, asmstr, pattern> {
- bits<5> rd;
-
- let Inst{15 - 12} = opcode;
- let Inst{11 - 10} = f;
- let Inst{9} = rd{4};
- let Inst{8 - 4} = rd;
- let Inst{3 - 0} = rd{3 - 0};
-}
-
//===----------------------------------------------------------------------===//
// Instruction of the format `<mnemonic> Z, Rd`
// <|1001|001r|rrrr|0ttt>
@@ -445,11 +434,6 @@
let Inst = opcode;
}
-class F32<bits<32> opcode, dag outs, dag ins, string asmstr, list<dag> pattern>
- : AVRInst32<outs, ins, asmstr, pattern> {
- let Inst = opcode;
-}
-
//===----------------------------------------------------------------------===//
// Branching instructions with immediate12: <|110f|kkkk|kkkk|kkkk|>
// f = secondary opcode = 1 bit
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