[llvm] fda9a9c - [X86][Codegen] Remove dead code for ADCX/ADOX
Shengchen Kan via llvm-commits
llvm-commits at lists.llvm.org
Sun Aug 13 19:23:49 PDT 2023
Author: Shengchen Kan
Date: 2023-08-14T10:23:42+08:00
New Revision: fda9a9c61ebf4f768ad0a230141fb4123128697f
URL: https://github.com/llvm/llvm-project/commit/fda9a9c61ebf4f768ad0a230141fb4123128697f
DIFF: https://github.com/llvm/llvm-project/commit/fda9a9c61ebf4f768ad0a230141fb4123128697f.diff
LOG: [X86][Codegen] Remove dead code for ADCX/ADOX
There is no pattern for ADCX/ADOX and they are never selected during
ISEL. So we remove the cases in some MIR optimizations in this patch.
Reviewed By: craig.topper
Differential Revision: https://reviews.llvm.org/D157717
Added:
Modified:
llvm/lib/Target/X86/X86FlagsCopyLowering.cpp
llvm/lib/Target/X86/X86ISelLowering.cpp
llvm/lib/Target/X86/X86InstrInfo.cpp
llvm/test/CodeGen/X86/flags-copy-lowering.mir
Removed:
llvm/test/CodeGen/X86/adx-commute.mir
llvm/test/CodeGen/X86/stack-folding-adx.mir
################################################################################
diff --git a/llvm/lib/Target/X86/X86FlagsCopyLowering.cpp b/llvm/lib/Target/X86/X86FlagsCopyLowering.cpp
index f24dbcfe972df2..36efb5c2045c7a 100644
--- a/llvm/lib/Target/X86/X86FlagsCopyLowering.cpp
+++ b/llvm/lib/Target/X86/X86FlagsCopyLowering.cpp
@@ -156,8 +156,6 @@ namespace {
/// dispatch with specific functionality.
enum class FlagArithMnemonic {
ADC,
- ADCX,
- ADOX,
RCL,
RCR,
SBB,
@@ -221,18 +219,6 @@ static FlagArithMnemonic getMnemonicFromOpcode(unsigned Opcode) {
#undef LLVM_EXPAND_INSTR_SIZES
- case X86::ADCX32rr:
- case X86::ADCX64rr:
- case X86::ADCX32rm:
- case X86::ADCX64rm:
- return FlagArithMnemonic::ADCX;
-
- case X86::ADOX32rr:
- case X86::ADOX64rr:
- case X86::ADOX32rm:
- case X86::ADOX64rm:
- return FlagArithMnemonic::ADOX;
-
case X86::SETB_C32r:
case X86::SETB_C64r:
return FlagArithMnemonic::SETB;
@@ -802,7 +788,6 @@ void X86FlagsCopyLoweringPass::rewriteArithmetic(
switch (getMnemonicFromOpcode(MI.getOpcode())) {
case FlagArithMnemonic::ADC:
- case FlagArithMnemonic::ADCX:
case FlagArithMnemonic::RCL:
case FlagArithMnemonic::RCR:
case FlagArithMnemonic::SBB:
@@ -812,13 +797,6 @@ void X86FlagsCopyLoweringPass::rewriteArithmetic(
// having a higher bit available.
Addend = 255;
break;
-
- case FlagArithMnemonic::ADOX:
- Cond = X86::COND_O; // OF == 1
- // Set up an addend that when one is added will turn from positive to
- // negative and thus overflow in the signed domain.
- Addend = 127;
- break;
}
// Now get a register that contains the value of the flag input to the
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index 30852a7f75f2c4..547cc1d9456775 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -25698,7 +25698,7 @@ SDValue X86TargetLowering::LowerINTRINSIC_WO_CHAIN(SDValue Op,
return DAG.getNode(IntrData->Opc0, dl, Op.getValueType(),
Op.getOperand(1), Control);
}
- // ADC/ADCX/SBB
+ // ADC/SBB
case ADX: {
SDVTList CFVTs = DAG.getVTList(Op->getValueType(0), MVT::i32);
SDVTList VTs = DAG.getVTList(Op.getOperand(2).getValueType(), MVT::i32);
diff --git a/llvm/lib/Target/X86/X86InstrInfo.cpp b/llvm/lib/Target/X86/X86InstrInfo.cpp
index 96d3407d6c0713..41d3a3e89fe9a0 100644
--- a/llvm/lib/Target/X86/X86InstrInfo.cpp
+++ b/llvm/lib/Target/X86/X86InstrInfo.cpp
@@ -185,7 +185,7 @@ bool X86InstrInfo::isDataInvariant(MachineInstr &MI) {
isSBB(Opcode) || isSUB(Opcode) || isXOR(Opcode))
return true;
// Arithmetic with just 32-bit and 64-bit variants and no immediates.
- if (isADCX(Opcode) || isADOX(Opcode) || isANDN(Opcode))
+ if (isANDN(Opcode))
return true;
// Unary arithmetic operations.
if (isDEC(Opcode) || isINC(Opcode) || isNEG(Opcode))
@@ -284,14 +284,10 @@ bool X86InstrInfo::isDataInvariantLoad(MachineInstr &MI) {
case X86::ADC16rm:
case X86::ADC32rm:
case X86::ADC64rm:
- case X86::ADCX32rm:
- case X86::ADCX64rm:
case X86::ADD8rm:
case X86::ADD16rm:
case X86::ADD32rm:
case X86::ADD64rm:
- case X86::ADOX32rm:
- case X86::ADOX64rm:
case X86::AND8rm:
case X86::AND16rm:
case X86::AND32rm:
diff --git a/llvm/test/CodeGen/X86/adx-commute.mir b/llvm/test/CodeGen/X86/adx-commute.mir
deleted file mode 100644
index aa20084f7cd9e5..00000000000000
--- a/llvm/test/CodeGen/X86/adx-commute.mir
+++ /dev/null
@@ -1,234 +0,0 @@
-# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
-# RUN: llc -o - -mtriple=x86_64-- -run-pass=twoaddressinstruction,register-coalescer %s | FileCheck %s
-# Tests for commuting ADCX and ADOX to avoid copies. The ADOX tests were manually constructed by modifying ADCX tests to use OF instead of CF.
---- |
- ; ModuleID = 'test.ll'
- source_filename = "test.ll"
- target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128"
-
- define void @adcx32_commute(i8 %cf, i32 %a, i32 %b, ptr %res) #0 {
- %ret = call { i8, i32 } @llvm.x86.addcarry.32(i8 %cf, i32 %a, i32 %b)
- %1 = extractvalue { i8, i32 } %ret, 1
- %2 = mul i32 %a, %1
- store i32 %2, ptr %res
- ret void
- }
-
- define void @adcx64_commute(i8 %cf, i64 %a, i64 %b, ptr %res) #0 {
- %ret = call { i8, i64 } @llvm.x86.addcarry.64(i8 %cf, i64 %a, i64 %b)
- %1 = extractvalue { i8, i64 } %ret, 1
- %2 = mul i64 %a, %1
- store i64 %2, ptr %res
- ret void
- }
-
- define void @adox32_commute(i8 %cf, i32 %a, i32 %b, ptr %res) #0 {
- %ret = call { i8, i32 } @llvm.x86.addcarry.32(i8 %cf, i32 %a, i32 %b)
- %1 = extractvalue { i8, i32 } %ret, 1
- %2 = mul i32 %a, %1
- store i32 %2, ptr %res
- ret void
- }
-
- define void @adox64_commute(i8 %cf, i64 %a, i64 %b, ptr %res) #0 {
- %ret = call { i8, i64 } @llvm.x86.addcarry.64(i8 %cf, i64 %a, i64 %b)
- %1 = extractvalue { i8, i64 } %ret, 1
- %2 = mul i64 %a, %1
- store i64 %2, ptr %res
- ret void
- }
-
- ; Function Attrs: nounwind readnone
- declare { i8, i32 } @llvm.x86.addcarry.32(i8, i32, i32) #1
-
- ; Function Attrs: nounwind readnone
- declare { i8, i64 } @llvm.x86.addcarry.64(i8, i64, i64) #1
-
- ; Function Attrs: nounwind
- declare void @llvm.stackprotector(ptr, ptr) #2
-
- attributes #0 = { "target-features"="+adx" }
- attributes #1 = { nounwind readnone "target-features"="+adx" }
- attributes #2 = { nounwind }
-
-...
----
-name: adcx32_commute
-alignment: 16
-tracksRegLiveness: true
-registers:
- - { id: 0, class: gr32 }
- - { id: 1, class: gr32 }
- - { id: 2, class: gr32 }
- - { id: 3, class: gr64 }
- - { id: 4, class: gr8 }
- - { id: 5, class: gr8 }
- - { id: 6, class: gr32 }
- - { id: 7, class: gr32 }
-liveins:
- - { reg: '$edi', virtual-reg: '%0' }
- - { reg: '$esi', virtual-reg: '%1' }
- - { reg: '$edx', virtual-reg: '%2' }
- - { reg: '$rcx', virtual-reg: '%3' }
-body: |
- bb.0 (%ir-block.0):
- liveins: $edi, $esi, $edx, $rcx
-
- ; CHECK-LABEL: name: adcx32_commute
- ; CHECK: liveins: $edi, $esi, $edx, $rcx
- ; CHECK: [[COPY:%[0-9]+]]:gr64 = COPY $rcx
- ; CHECK: [[COPY1:%[0-9]+]]:gr32 = COPY $edx
- ; CHECK: [[COPY2:%[0-9]+]]:gr32 = COPY $esi
- ; CHECK: [[COPY3:%[0-9]+]]:gr32 = COPY $edi
- ; CHECK: dead [[COPY3]].sub_8bit:gr32 = ADD8ri [[COPY3]].sub_8bit, -1, implicit-def $eflags
- ; CHECK: [[ADCX32rr:%[0-9]+]]:gr32 = ADCX32rr [[ADCX32rr]], [[COPY2]], implicit-def dead $eflags, implicit killed $eflags
- ; CHECK: [[IMUL32rr:%[0-9]+]]:gr32 = IMUL32rr [[IMUL32rr]], [[COPY2]], implicit-def dead $eflags
- ; CHECK: MOV32mr [[COPY]], 1, $noreg, 0, $noreg, [[IMUL32rr]] :: (store (s32) into %ir.res)
- ; CHECK: RET 0
- %3:gr64 = COPY killed $rcx
- %2:gr32 = COPY killed $edx
- %1:gr32 = COPY killed $esi
- %0:gr32 = COPY killed $edi
- %4:gr8 = COPY killed %0.sub_8bit
- dead %5:gr8 = ADD8ri killed %4, -1, implicit-def $eflags
- %6:gr32 = ADCX32rr %1, killed %2, implicit-def dead $eflags, implicit killed $eflags
- %7:gr32 = IMUL32rr killed %1, killed %6, implicit-def dead $eflags
- MOV32mr killed %3, 1, $noreg, 0, $noreg, killed %7 :: (store (s32) into %ir.res)
- RET 0
-
-...
----
-name: adcx64_commute
-alignment: 16
-tracksRegLiveness: true
-registers:
- - { id: 0, class: gr32 }
- - { id: 1, class: gr64 }
- - { id: 2, class: gr64 }
- - { id: 3, class: gr64 }
- - { id: 4, class: gr8 }
- - { id: 5, class: gr8 }
- - { id: 6, class: gr64 }
- - { id: 7, class: gr64 }
-liveins:
- - { reg: '$edi', virtual-reg: '%0' }
- - { reg: '$rsi', virtual-reg: '%1' }
- - { reg: '$rdx', virtual-reg: '%2' }
- - { reg: '$rcx', virtual-reg: '%3' }
-body: |
- bb.0 (%ir-block.0):
- liveins: $edi, $rsi, $rdx, $rcx
-
- ; CHECK-LABEL: name: adcx64_commute
- ; CHECK: liveins: $edi, $rsi, $rdx, $rcx
- ; CHECK: [[COPY:%[0-9]+]]:gr64 = COPY $rcx
- ; CHECK: [[COPY1:%[0-9]+]]:gr64 = COPY $rdx
- ; CHECK: [[COPY2:%[0-9]+]]:gr64 = COPY $rsi
- ; CHECK: [[COPY3:%[0-9]+]]:gr32 = COPY $edi
- ; CHECK: dead [[COPY3]].sub_8bit:gr32 = ADD8ri [[COPY3]].sub_8bit, -1, implicit-def $eflags
- ; CHECK: [[ADCX64rr:%[0-9]+]]:gr64 = ADCX64rr [[ADCX64rr]], [[COPY2]], implicit-def dead $eflags, implicit killed $eflags
- ; CHECK: [[IMUL64rr:%[0-9]+]]:gr64 = IMUL64rr [[IMUL64rr]], [[COPY2]], implicit-def dead $eflags
- ; CHECK: MOV64mr [[COPY]], 1, $noreg, 0, $noreg, [[IMUL64rr]] :: (store (s64) into %ir.res)
- ; CHECK: RET 0
- %3:gr64 = COPY killed $rcx
- %2:gr64 = COPY killed $rdx
- %1:gr64 = COPY killed $rsi
- %0:gr32 = COPY killed $edi
- %4:gr8 = COPY killed %0.sub_8bit
- dead %5:gr8 = ADD8ri killed %4, -1, implicit-def $eflags
- %6:gr64 = ADCX64rr %1, killed %2, implicit-def dead $eflags, implicit killed $eflags
- %7:gr64 = IMUL64rr killed %1, killed %6, implicit-def dead $eflags
- MOV64mr killed %3, 1, $noreg, 0, $noreg, killed %7 :: (store (s64) into %ir.res)
- RET 0
-
-...
----
-name: adox32_commute
-alignment: 16
-tracksRegLiveness: true
-registers:
- - { id: 0, class: gr32 }
- - { id: 1, class: gr32 }
- - { id: 2, class: gr32 }
- - { id: 3, class: gr64 }
- - { id: 4, class: gr8 }
- - { id: 5, class: gr8 }
- - { id: 6, class: gr32 }
- - { id: 7, class: gr32 }
-liveins:
- - { reg: '$edi', virtual-reg: '%0' }
- - { reg: '$esi', virtual-reg: '%1' }
- - { reg: '$edx', virtual-reg: '%2' }
- - { reg: '$rcx', virtual-reg: '%3' }
-body: |
- bb.0 (%ir-block.0):
- liveins: $edi, $esi, $edx, $rcx
-
- ; CHECK-LABEL: name: adox32_commute
- ; CHECK: liveins: $edi, $esi, $edx, $rcx
- ; CHECK: [[COPY:%[0-9]+]]:gr64 = COPY $rcx
- ; CHECK: [[COPY1:%[0-9]+]]:gr32 = COPY $edx
- ; CHECK: [[COPY2:%[0-9]+]]:gr32 = COPY $esi
- ; CHECK: [[COPY3:%[0-9]+]]:gr32 = COPY $edi
- ; CHECK: dead [[COPY3]].sub_8bit:gr32 = ADD8ri [[COPY3]].sub_8bit, 127, implicit-def $eflags
- ; CHECK: [[ADOX32rr:%[0-9]+]]:gr32 = ADOX32rr [[ADOX32rr]], [[COPY2]], implicit-def dead $eflags, implicit killed $eflags
- ; CHECK: [[IMUL32rr:%[0-9]+]]:gr32 = IMUL32rr [[IMUL32rr]], [[COPY2]], implicit-def dead $eflags
- ; CHECK: MOV32mr [[COPY]], 1, $noreg, 0, $noreg, [[IMUL32rr]] :: (store (s32) into %ir.res)
- ; CHECK: RET 0
- %3:gr64 = COPY killed $rcx
- %2:gr32 = COPY killed $edx
- %1:gr32 = COPY killed $esi
- %0:gr32 = COPY killed $edi
- %4:gr8 = COPY killed %0.sub_8bit
- dead %5:gr8 = ADD8ri killed %4, 127, implicit-def $eflags
- %6:gr32 = ADOX32rr %1, killed %2, implicit-def dead $eflags, implicit killed $eflags
- %7:gr32 = IMUL32rr killed %1, killed %6, implicit-def dead $eflags
- MOV32mr killed %3, 1, $noreg, 0, $noreg, killed %7 :: (store (s32) into %ir.res)
- RET 0
-
-...
----
-name: adox64_commute
-alignment: 16
-tracksRegLiveness: true
-registers:
- - { id: 0, class: gr32 }
- - { id: 1, class: gr64 }
- - { id: 2, class: gr64 }
- - { id: 3, class: gr64 }
- - { id: 4, class: gr8 }
- - { id: 5, class: gr8 }
- - { id: 6, class: gr64 }
- - { id: 7, class: gr64 }
-liveins:
- - { reg: '$edi', virtual-reg: '%0' }
- - { reg: '$rsi', virtual-reg: '%1' }
- - { reg: '$rdx', virtual-reg: '%2' }
- - { reg: '$rcx', virtual-reg: '%3' }
-body: |
- bb.0 (%ir-block.0):
- liveins: $edi, $rsi, $rdx, $rcx
-
- ; CHECK-LABEL: name: adox64_commute
- ; CHECK: liveins: $edi, $rsi, $rdx, $rcx
- ; CHECK: [[COPY:%[0-9]+]]:gr64 = COPY $rcx
- ; CHECK: [[COPY1:%[0-9]+]]:gr64 = COPY $rdx
- ; CHECK: [[COPY2:%[0-9]+]]:gr64 = COPY $rsi
- ; CHECK: [[COPY3:%[0-9]+]]:gr32 = COPY $edi
- ; CHECK: dead [[COPY3]].sub_8bit:gr32 = ADD8ri [[COPY3]].sub_8bit, 127, implicit-def $eflags
- ; CHECK: [[ADOX64rr:%[0-9]+]]:gr64 = ADOX64rr [[ADOX64rr]], [[COPY2]], implicit-def dead $eflags, implicit killed $eflags
- ; CHECK: [[IMUL64rr:%[0-9]+]]:gr64 = IMUL64rr [[IMUL64rr]], [[COPY2]], implicit-def dead $eflags
- ; CHECK: MOV64mr [[COPY]], 1, $noreg, 0, $noreg, [[IMUL64rr]] :: (store (s64) into %ir.res)
- ; CHECK: RET 0
- %3:gr64 = COPY killed $rcx
- %2:gr64 = COPY killed $rdx
- %1:gr64 = COPY killed $rsi
- %0:gr32 = COPY killed $edi
- %4:gr8 = COPY killed %0.sub_8bit
- dead %5:gr8 = ADD8ri killed %4, 127, implicit-def $eflags
- %6:gr64 = ADOX64rr %1, killed %2, implicit-def dead $eflags, implicit killed $eflags
- %7:gr64 = IMUL64rr killed %1, killed %6, implicit-def dead $eflags
- MOV64mr killed %3, 1, $noreg, 0, $noreg, killed %7 :: (store (s64) into %ir.res)
- RET 0
-
-...
diff --git a/llvm/test/CodeGen/X86/flags-copy-lowering.mir b/llvm/test/CodeGen/X86/flags-copy-lowering.mir
index 900900fdc6653d..f003005bb2b4aa 100644
--- a/llvm/test/CodeGen/X86/flags-copy-lowering.mir
+++ b/llvm/test/CodeGen/X86/flags-copy-lowering.mir
@@ -43,18 +43,6 @@
ret void
}
- define void @test_adcx(i64 %a, i64 %b) {
- entry:
- call void @foo()
- ret void
- }
-
- define void @test_adox(i64 %a, i64 %b) {
- entry:
- call void @foo()
- ret void
- }
-
define void @test_rcl(i64 %a, i64 %b) {
entry:
call void @foo()
@@ -371,84 +359,6 @@ body: |
RET 0
-...
----
-name: test_adcx
-# CHECK-LABEL: name: test_adcx
-liveins:
- - { reg: '$rdi', virtual-reg: '%0' }
- - { reg: '$rsi', virtual-reg: '%1' }
-body: |
- bb.0:
- liveins: $rdi, $rsi
-
- %0:gr64 = COPY $rdi
- %1:gr64 = COPY $rsi
- %2:gr64 = ADD64rr %0, %1, implicit-def $eflags
- %3:gr64 = COPY $eflags
- ; CHECK-NOT: COPY{{( killed)?}} $eflags
- ; CHECK: %[[E_REG:[^:]*]]:gr8 = SETCCr 4, implicit $eflags
- ; CHECK-NEXT: %[[CF_REG:[^:]*]]:gr8 = SETCCr 2, implicit $eflags
- ; CHECK-NOT: COPY{{( killed)?}} $eflags
-
- ADJCALLSTACKDOWN64 0, 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp
- CALL64pcrel32 @foo, csr_64, implicit $rsp, implicit $ssp, implicit $rdi, implicit-def $rsp, implicit-def $ssp, implicit-def $eax
- ADJCALLSTACKUP64 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp
-
- $eflags = COPY %3
- %4:gr64 = CMOV64rr %0, %1, 4, implicit $eflags
- %5:gr64 = MOV64ri32 42
- %6:gr64 = ADCX64rr %2, %5, implicit-def $eflags, implicit $eflags
- ; CHECK-NOT: $eflags =
- ; CHECK: TEST8rr %[[E_REG]], %[[E_REG]], implicit-def $eflags
- ; CHECK-NEXT: %4:gr64 = CMOV64rr %0, %1, 5, implicit killed $eflags
- ; CHECK-NEXT: %5:gr64 = MOV64ri32 42
- ; CHECK-NEXT: dead %{{[^:]*}}:gr8 = ADD8ri %[[CF_REG]], 255, implicit-def $eflags
- ; CHECK-NEXT: %6:gr64 = ADCX64rr %2, %5, implicit-def{{( dead)?}} $eflags, implicit killed $eflags
- MOV64mr $rsp, 1, $noreg, -16, $noreg, killed %4
- MOV64mr $rsp, 1, $noreg, -16, $noreg, killed %6
-
- RET 0
-
-...
----
-name: test_adox
-# CHECK-LABEL: name: test_adox
-liveins:
- - { reg: '$rdi', virtual-reg: '%0' }
- - { reg: '$rsi', virtual-reg: '%1' }
-body: |
- bb.0:
- liveins: $rdi, $rsi
-
- %0:gr64 = COPY $rdi
- %1:gr64 = COPY $rsi
- %2:gr64 = ADD64rr %0, %1, implicit-def $eflags
- %3:gr64 = COPY $eflags
- ; CHECK-NOT: COPY{{( killed)?}} $eflags
- ; CHECK: %[[E_REG:[^:]*]]:gr8 = SETCCr 4, implicit $eflags
- ; CHECK-NEXT: %[[OF_REG:[^:]*]]:gr8 = SETCCr 0, implicit $eflags
- ; CHECK-NOT: COPY{{( killed)?}} $eflags
-
- ADJCALLSTACKDOWN64 0, 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp
- CALL64pcrel32 @foo, csr_64, implicit $rsp, implicit $ssp, implicit $rdi, implicit-def $rsp, implicit-def $ssp, implicit-def $eax
- ADJCALLSTACKUP64 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp
-
- $eflags = COPY %3
- %4:gr64 = CMOV64rr %0, %1, 4, implicit $eflags
- %5:gr64 = MOV64ri32 42
- %6:gr64 = ADOX64rr %2, %5, implicit-def $eflags, implicit $eflags
- ; CHECK-NOT: $eflags =
- ; CHECK: TEST8rr %[[E_REG]], %[[E_REG]], implicit-def $eflags
- ; CHECK-NEXT: %4:gr64 = CMOV64rr %0, %1, 5, implicit killed $eflags
- ; CHECK-NEXT: %5:gr64 = MOV64ri32 42
- ; CHECK-NEXT: dead %{{[^:]*}}:gr8 = ADD8ri %[[OF_REG]], 127, implicit-def $eflags
- ; CHECK-NEXT: %6:gr64 = ADOX64rr %2, %5, implicit-def{{( dead)?}} $eflags, implicit killed $eflags
- MOV64mr $rsp, 1, $noreg, -16, $noreg, killed %4
- MOV64mr $rsp, 1, $noreg, -16, $noreg, killed %6
-
- RET 0
-
...
---
name: test_rcl
diff --git a/llvm/test/CodeGen/X86/stack-folding-adx.mir b/llvm/test/CodeGen/X86/stack-folding-adx.mir
deleted file mode 100644
index 11b1f4654e05a7..00000000000000
--- a/llvm/test/CodeGen/X86/stack-folding-adx.mir
+++ /dev/null
@@ -1,266 +0,0 @@
-# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
-# RUN: llc -o - -mtriple=x86_64-- -run-pass=greedy %s | FileCheck %s
-# Tests for stack folding ADCX and ADOX. The ADOX tests were manually constructed by modifying ADCX tests to use OF instead of CF.
---- |
- ; Function Attrs: nounwind
- define i8 @stack_fold_adcx32(i8 %a0, i32 %a1, i32 %a2, i8* %a3) #0 {
- tail call void asm sideeffect "nop", "~{rax},~{rbx},~{rcx},~{rdx},~{rsi},~{rdi},~{rbp},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r14},~{r15}"()
- %1 = call { i8, i32 } @llvm.x86.addcarry.32(i8 %a0, i32 %a1, i32 %a2)
- %2 = extractvalue { i8, i32 } %1, 1
- %3 = bitcast i8* %a3 to i32*
- store i32 %2, i32* %3, align 1
- %4 = extractvalue { i8, i32 } %1, 0
- ret i8 %4
- }
-
- ; Function Attrs: nounwind
- define i8 @stack_fold_adcx64(i8 %a0, i64 %a1, i64 %a2, i8* %a3) #0 {
- tail call void asm sideeffect "nop", "~{rax},~{rbx},~{rcx},~{rdx},~{rsi},~{rdi},~{rbp},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r14},~{r15}"()
- %1 = call { i8, i64 } @llvm.x86.addcarry.64(i8 %a0, i64 %a1, i64 %a2)
- %2 = extractvalue { i8, i64 } %1, 1
- %3 = bitcast i8* %a3 to i64*
- store i64 %2, i64* %3, align 1
- %4 = extractvalue { i8, i64 } %1, 0
- ret i8 %4
- }
-
- ; Function Attrs: nounwind
- define i8 @stack_fold_adox32(i8 %a0, i32 %a1, i32 %a2, i8* %a3) #0 {
- tail call void asm sideeffect "nop", "~{rax},~{rbx},~{rcx},~{rdx},~{rsi},~{rdi},~{rbp},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r14},~{r15}"()
- %1 = call { i8, i32 } @llvm.x86.addcarry.32(i8 %a0, i32 %a1, i32 %a2)
- %2 = extractvalue { i8, i32 } %1, 1
- %3 = bitcast i8* %a3 to i32*
- store i32 %2, i32* %3, align 1
- %4 = extractvalue { i8, i32 } %1, 0
- ret i8 %4
- }
-
- ; Function Attrs: nounwind
- define i8 @stack_fold_adox64(i8 %a0, i64 %a1, i64 %a2, i8* %a3) #0 {
- tail call void asm sideeffect "nop", "~{rax},~{rbx},~{rcx},~{rdx},~{rsi},~{rdi},~{rbp},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r14},~{r15}"()
- %1 = call { i8, i64 } @llvm.x86.addcarry.64(i8 %a0, i64 %a1, i64 %a2)
- %2 = extractvalue { i8, i64 } %1, 1
- %3 = bitcast i8* %a3 to i64*
- store i64 %2, i64* %3, align 1
- %4 = extractvalue { i8, i64 } %1, 0
- ret i8 %4
- }
-
- ; Function Attrs: nounwind readnone
- declare { i8, i32 } @llvm.x86.addcarry.32(i8, i32, i32) #1
-
- ; Function Attrs: nounwind readnone
- declare { i8, i64 } @llvm.x86.addcarry.64(i8, i64, i64) #1
-
- ; Function Attrs: nounwind
- declare void @llvm.stackprotector(i8*, i8**) #2
-
- attributes #0 = { nounwind "target-features"="+adx" }
- attributes #1 = { nounwind readnone "target-features"="+adx" }
- attributes #2 = { nounwind }
-
-...
----
-name: stack_fold_adcx32
-alignment: 16
-tracksRegLiveness: true
-registers:
- - { id: 0, class: gr32 }
- - { id: 1, class: gr32 }
- - { id: 2, class: gr32 }
- - { id: 3, class: gr64 }
- - { id: 4, class: gr8 }
- - { id: 5, class: gr8 }
- - { id: 6, class: gr32 }
- - { id: 7, class: gr8 }
-liveins:
- - { reg: '$edi', virtual-reg: '%0' }
- - { reg: '$esi', virtual-reg: '%1' }
- - { reg: '$edx', virtual-reg: '%2' }
- - { reg: '$rcx', virtual-reg: '%3' }
-body: |
- bb.0 (%ir-block.0):
- liveins: $edi, $esi, $edx, $rcx
-
- ; CHECK-LABEL: name: stack_fold_adcx32
- ; CHECK: liveins: $edi, $esi, $edx, $rcx
- ; CHECK: MOV64mr %stack.0, 1, $noreg, 0, $noreg, $rcx :: (store (s64) into %stack.0)
- ; CHECK: MOV32mr %stack.1, 1, $noreg, 0, $noreg, $edx :: (store (s32) into %stack.1)
- ; CHECK: MOV32mr %stack.2, 1, $noreg, 0, $noreg, $esi :: (store (s32) into %stack.2)
- ; CHECK: MOV32mr %stack.3, 1, $noreg, 0, $noreg, $edi :: (store (s32) into %stack.3)
- ; CHECK: INLINEASM &nop, 1 /* sideeffect attdialect */, 12 /* clobber */, implicit-def dead early-clobber $rax, 12 /* clobber */, implicit-def dead early-clobber $rbx, 12 /* clobber */, implicit-def dead early-clobber $rcx, 12 /* clobber */, implicit-def dead early-clobber $rdx, 12 /* clobber */, implicit-def dead early-clobber $rsi, 12 /* clobber */, implicit-def dead early-clobber $rdi, 12 /* clobber */, implicit-def dead early-clobber $rbp, 12 /* clobber */, implicit-def dead early-clobber $r8, 12 /* clobber */, implicit-def dead early-clobber $r9, 12 /* clobber */, implicit-def dead early-clobber $r10, 12 /* clobber */, implicit-def dead early-clobber $r11, 12 /* clobber */, implicit-def dead early-clobber $r12, 12 /* clobber */, implicit-def dead early-clobber $r13, 12 /* clobber */, implicit-def dead early-clobber $r14, 12 /* clobber */, implicit-def dead early-clobber $r15
- ; CHECK: [[MOV32rm:%[0-9]+]]:gr32 = MOV32rm %stack.3, 1, $noreg, 0, $noreg :: (load (s32) from %stack.3)
- ; CHECK: dead [[MOV32rm]].sub_8bit:gr32 = ADD8ri [[MOV32rm]].sub_8bit, -1, implicit-def $eflags
- ; CHECK: [[MOV32rm1:%[0-9]+]]:gr32 = MOV32rm %stack.2, 1, $noreg, 0, $noreg :: (load (s32) from %stack.2)
- ; CHECK: [[ADCX32rm:%[0-9]+]]:gr32 = ADCX32rm [[ADCX32rm]], %stack.1, 1, $noreg, 0, $noreg, implicit-def $eflags, implicit killed $eflags :: (load (s32) from %stack.1)
- ; CHECK: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 2, implicit killed $eflags
- ; CHECK: [[MOV64rm:%[0-9]+]]:gr64 = MOV64rm %stack.0, 1, $noreg, 0, $noreg :: (load (s64) from %stack.0)
- ; CHECK: MOV32mr [[MOV64rm]], 1, $noreg, 0, $noreg, [[ADCX32rm]] :: (store (s32) into %ir.3, align 1)
- ; CHECK: $al = COPY [[SETCCr]]
- ; CHECK: RET 0, $al
- %3:gr64 = COPY $rcx
- %2:gr32 = COPY $edx
- %6:gr32 = COPY $esi
- %0:gr32 = COPY $edi
- INLINEASM &nop, 1 /* sideeffect attdialect */, 12 /* clobber */, implicit-def dead early-clobber $rax, 12 /* clobber */, implicit-def dead early-clobber $rbx, 12 /* clobber */, implicit-def dead early-clobber $rcx, 12 /* clobber */, implicit-def dead early-clobber $rdx, 12 /* clobber */, implicit-def dead early-clobber $rsi, 12 /* clobber */, implicit-def dead early-clobber $rdi, 12 /* clobber */, implicit-def dead early-clobber $rbp, 12 /* clobber */, implicit-def dead early-clobber $r8, 12 /* clobber */, implicit-def dead early-clobber $r9, 12 /* clobber */, implicit-def dead early-clobber $r10, 12 /* clobber */, implicit-def dead early-clobber $r11, 12 /* clobber */, implicit-def dead early-clobber $r12, 12 /* clobber */, implicit-def dead early-clobber $r13, 12 /* clobber */, implicit-def dead early-clobber $r14, 12 /* clobber */, implicit-def dead early-clobber $r15
- dead %0.sub_8bit:gr32 = ADD8ri %0.sub_8bit, -1, implicit-def $eflags
- %6:gr32 = ADCX32rr %6, %2, implicit-def $eflags, implicit killed $eflags
- %7:gr8 = SETCCr 2, implicit killed $eflags
- MOV32mr %3, 1, $noreg, 0, $noreg, %6 :: (store (s32) into %ir.3, align 1)
- $al = COPY %7
- RET 0, killed $al
-
-...
----
-name: stack_fold_adcx64
-alignment: 16
-tracksRegLiveness: true
-registers:
- - { id: 0, class: gr32 }
- - { id: 1, class: gr64 }
- - { id: 2, class: gr64 }
- - { id: 3, class: gr64 }
- - { id: 4, class: gr8 }
- - { id: 5, class: gr8 }
- - { id: 6, class: gr64 }
- - { id: 7, class: gr8 }
-liveins:
- - { reg: '$edi', virtual-reg: '%0' }
- - { reg: '$rsi', virtual-reg: '%1' }
- - { reg: '$rdx', virtual-reg: '%2' }
- - { reg: '$rcx', virtual-reg: '%3' }
-body: |
- bb.0 (%ir-block.0):
- liveins: $edi, $rsi, $rdx, $rcx
-
- ; CHECK-LABEL: name: stack_fold_adcx64
- ; CHECK: liveins: $edi, $rsi, $rdx, $rcx
- ; CHECK: MOV64mr %stack.0, 1, $noreg, 0, $noreg, $rcx :: (store (s64) into %stack.0)
- ; CHECK: MOV64mr %stack.1, 1, $noreg, 0, $noreg, $rdx :: (store (s64) into %stack.1)
- ; CHECK: MOV64mr %stack.2, 1, $noreg, 0, $noreg, $rsi :: (store (s64) into %stack.2)
- ; CHECK: MOV32mr %stack.3, 1, $noreg, 0, $noreg, $edi :: (store (s32) into %stack.3)
- ; CHECK: INLINEASM &nop, 1 /* sideeffect attdialect */, 12 /* clobber */, implicit-def dead early-clobber $rax, 12 /* clobber */, implicit-def dead early-clobber $rbx, 12 /* clobber */, implicit-def dead early-clobber $rcx, 12 /* clobber */, implicit-def dead early-clobber $rdx, 12 /* clobber */, implicit-def dead early-clobber $rsi, 12 /* clobber */, implicit-def dead early-clobber $rdi, 12 /* clobber */, implicit-def dead early-clobber $rbp, 12 /* clobber */, implicit-def dead early-clobber $r8, 12 /* clobber */, implicit-def dead early-clobber $r9, 12 /* clobber */, implicit-def dead early-clobber $r10, 12 /* clobber */, implicit-def dead early-clobber $r11, 12 /* clobber */, implicit-def dead early-clobber $r12, 12 /* clobber */, implicit-def dead early-clobber $r13, 12 /* clobber */, implicit-def dead early-clobber $r14, 12 /* clobber */, implicit-def dead early-clobber $r15
- ; CHECK: [[MOV32rm:%[0-9]+]]:gr32 = MOV32rm %stack.3, 1, $noreg, 0, $noreg :: (load (s32) from %stack.3)
- ; CHECK: dead [[MOV32rm]].sub_8bit:gr32 = ADD8ri [[MOV32rm]].sub_8bit, -1, implicit-def $eflags
- ; CHECK: [[MOV64rm:%[0-9]+]]:gr64 = MOV64rm %stack.2, 1, $noreg, 0, $noreg :: (load (s64) from %stack.2)
- ; CHECK: [[ADCX64rm:%[0-9]+]]:gr64 = ADCX64rm [[ADCX64rm]], %stack.1, 1, $noreg, 0, $noreg, implicit-def $eflags, implicit killed $eflags :: (load (s64) from %stack.1)
- ; CHECK: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 2, implicit killed $eflags
- ; CHECK: [[MOV64rm:%[0-9]+]]:gr64 = MOV64rm %stack.0, 1, $noreg, 0, $noreg :: (load (s64) from %stack.0)
- ; CHECK: MOV64mr [[MOV64rm]], 1, $noreg, 0, $noreg, [[ADCX64rm]] :: (store (s64) into %ir.3, align 1)
- ; CHECK: $al = COPY [[SETCCr]]
- ; CHECK: RET 0, $al
- %3:gr64 = COPY $rcx
- %2:gr64 = COPY $rdx
- %6:gr64 = COPY $rsi
- %0:gr32 = COPY $edi
- INLINEASM &nop, 1 /* sideeffect attdialect */, 12 /* clobber */, implicit-def dead early-clobber $rax, 12 /* clobber */, implicit-def dead early-clobber $rbx, 12 /* clobber */, implicit-def dead early-clobber $rcx, 12 /* clobber */, implicit-def dead early-clobber $rdx, 12 /* clobber */, implicit-def dead early-clobber $rsi, 12 /* clobber */, implicit-def dead early-clobber $rdi, 12 /* clobber */, implicit-def dead early-clobber $rbp, 12 /* clobber */, implicit-def dead early-clobber $r8, 12 /* clobber */, implicit-def dead early-clobber $r9, 12 /* clobber */, implicit-def dead early-clobber $r10, 12 /* clobber */, implicit-def dead early-clobber $r11, 12 /* clobber */, implicit-def dead early-clobber $r12, 12 /* clobber */, implicit-def dead early-clobber $r13, 12 /* clobber */, implicit-def dead early-clobber $r14, 12 /* clobber */, implicit-def dead early-clobber $r15
- dead %0.sub_8bit:gr32 = ADD8ri %0.sub_8bit, -1, implicit-def $eflags
- %6:gr64 = ADCX64rr %6, %2, implicit-def $eflags, implicit killed $eflags
- %7:gr8 = SETCCr 2, implicit killed $eflags
- MOV64mr %3, 1, $noreg, 0, $noreg, %6 :: (store (s64) into %ir.3, align 1)
- $al = COPY %7
- RET 0, killed $al
-
-...
----
-name: stack_fold_adox32
-alignment: 16
-tracksRegLiveness: true
-registers:
- - { id: 0, class: gr32 }
- - { id: 1, class: gr32 }
- - { id: 2, class: gr32 }
- - { id: 3, class: gr64 }
- - { id: 4, class: gr8 }
- - { id: 5, class: gr8 }
- - { id: 6, class: gr32 }
- - { id: 7, class: gr8 }
-liveins:
- - { reg: '$edi', virtual-reg: '%0' }
- - { reg: '$esi', virtual-reg: '%1' }
- - { reg: '$edx', virtual-reg: '%2' }
- - { reg: '$rcx', virtual-reg: '%3' }
-body: |
- bb.0 (%ir-block.0):
- liveins: $edi, $esi, $edx, $rcx
-
- ; CHECK-LABEL: name: stack_fold_adox32
- ; CHECK: liveins: $edi, $esi, $edx, $rcx
- ; CHECK: MOV64mr %stack.0, 1, $noreg, 0, $noreg, $rcx :: (store (s64) into %stack.0)
- ; CHECK: MOV32mr %stack.1, 1, $noreg, 0, $noreg, $edx :: (store (s32) into %stack.1)
- ; CHECK: MOV32mr %stack.2, 1, $noreg, 0, $noreg, $esi :: (store (s32) into %stack.2)
- ; CHECK: MOV32mr %stack.3, 1, $noreg, 0, $noreg, $edi :: (store (s32) into %stack.3)
- ; CHECK: INLINEASM &nop, 1 /* sideeffect attdialect */, 12 /* clobber */, implicit-def dead early-clobber $rax, 12 /* clobber */, implicit-def dead early-clobber $rbx, 12 /* clobber */, implicit-def dead early-clobber $rcx, 12 /* clobber */, implicit-def dead early-clobber $rdx, 12 /* clobber */, implicit-def dead early-clobber $rsi, 12 /* clobber */, implicit-def dead early-clobber $rdi, 12 /* clobber */, implicit-def dead early-clobber $rbp, 12 /* clobber */, implicit-def dead early-clobber $r8, 12 /* clobber */, implicit-def dead early-clobber $r9, 12 /* clobber */, implicit-def dead early-clobber $r10, 12 /* clobber */, implicit-def dead early-clobber $r11, 12 /* clobber */, implicit-def dead early-clobber $r12, 12 /* clobber */, implicit-def dead early-clobber $r13, 12 /* clobber */, implicit-def dead early-clobber $r14, 12 /* clobber */, implicit-def dead early-clobber $r15
- ; CHECK: [[MOV32rm:%[0-9]+]]:gr32 = MOV32rm %stack.3, 1, $noreg, 0, $noreg :: (load (s32) from %stack.3)
- ; CHECK: dead [[MOV32rm]].sub_8bit:gr32 = ADD8ri [[MOV32rm]].sub_8bit, -1, implicit-def $eflags
- ; CHECK: [[MOV32rm1:%[0-9]+]]:gr32 = MOV32rm %stack.2, 1, $noreg, 0, $noreg :: (load (s32) from %stack.2)
- ; CHECK: [[ADOX32rm:%[0-9]+]]:gr32 = ADOX32rm [[ADOX32rm]], %stack.1, 1, $noreg, 0, $noreg, implicit-def $eflags, implicit killed $eflags :: (load (s32) from %stack.1)
- ; CHECK: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 2, implicit killed $eflags
- ; CHECK: [[MOV64rm:%[0-9]+]]:gr64 = MOV64rm %stack.0, 1, $noreg, 0, $noreg :: (load (s64) from %stack.0)
- ; CHECK: MOV32mr [[MOV64rm]], 1, $noreg, 0, $noreg, [[ADOX32rm]] :: (store (s32) into %ir.3, align 1)
- ; CHECK: $al = COPY [[SETCCr]]
- ; CHECK: RET 0, $al
- %3:gr64 = COPY $rcx
- %2:gr32 = COPY $edx
- %6:gr32 = COPY $esi
- %0:gr32 = COPY $edi
- INLINEASM &nop, 1 /* sideeffect attdialect */, 12 /* clobber */, implicit-def dead early-clobber $rax, 12 /* clobber */, implicit-def dead early-clobber $rbx, 12 /* clobber */, implicit-def dead early-clobber $rcx, 12 /* clobber */, implicit-def dead early-clobber $rdx, 12 /* clobber */, implicit-def dead early-clobber $rsi, 12 /* clobber */, implicit-def dead early-clobber $rdi, 12 /* clobber */, implicit-def dead early-clobber $rbp, 12 /* clobber */, implicit-def dead early-clobber $r8, 12 /* clobber */, implicit-def dead early-clobber $r9, 12 /* clobber */, implicit-def dead early-clobber $r10, 12 /* clobber */, implicit-def dead early-clobber $r11, 12 /* clobber */, implicit-def dead early-clobber $r12, 12 /* clobber */, implicit-def dead early-clobber $r13, 12 /* clobber */, implicit-def dead early-clobber $r14, 12 /* clobber */, implicit-def dead early-clobber $r15
- dead %0.sub_8bit:gr32 = ADD8ri %0.sub_8bit, -1, implicit-def $eflags
- %6:gr32 = ADOX32rr %6, %2, implicit-def $eflags, implicit killed $eflags
- %7:gr8 = SETCCr 2, implicit killed $eflags
- MOV32mr %3, 1, $noreg, 0, $noreg, %6 :: (store (s32) into %ir.3, align 1)
- $al = COPY %7
- RET 0, killed $al
-
-...
----
-name: stack_fold_adox64
-alignment: 16
-tracksRegLiveness: true
-registers:
- - { id: 0, class: gr32 }
- - { id: 1, class: gr64 }
- - { id: 2, class: gr64 }
- - { id: 3, class: gr64 }
- - { id: 4, class: gr8 }
- - { id: 5, class: gr8 }
- - { id: 6, class: gr64 }
- - { id: 7, class: gr8 }
-liveins:
- - { reg: '$edi', virtual-reg: '%0' }
- - { reg: '$rsi', virtual-reg: '%1' }
- - { reg: '$rdx', virtual-reg: '%2' }
- - { reg: '$rcx', virtual-reg: '%3' }
-body: |
- bb.0 (%ir-block.0):
- liveins: $edi, $rsi, $rdx, $rcx
-
- ; CHECK-LABEL: name: stack_fold_adox64
- ; CHECK: liveins: $edi, $rsi, $rdx, $rcx
- ; CHECK: MOV64mr %stack.0, 1, $noreg, 0, $noreg, $rcx :: (store (s64) into %stack.0)
- ; CHECK: MOV64mr %stack.1, 1, $noreg, 0, $noreg, $rdx :: (store (s64) into %stack.1)
- ; CHECK: MOV64mr %stack.2, 1, $noreg, 0, $noreg, $rsi :: (store (s64) into %stack.2)
- ; CHECK: MOV32mr %stack.3, 1, $noreg, 0, $noreg, $edi :: (store (s32) into %stack.3)
- ; CHECK: INLINEASM &nop, 1 /* sideeffect attdialect */, 12 /* clobber */, implicit-def dead early-clobber $rax, 12 /* clobber */, implicit-def dead early-clobber $rbx, 12 /* clobber */, implicit-def dead early-clobber $rcx, 12 /* clobber */, implicit-def dead early-clobber $rdx, 12 /* clobber */, implicit-def dead early-clobber $rsi, 12 /* clobber */, implicit-def dead early-clobber $rdi, 12 /* clobber */, implicit-def dead early-clobber $rbp, 12 /* clobber */, implicit-def dead early-clobber $r8, 12 /* clobber */, implicit-def dead early-clobber $r9, 12 /* clobber */, implicit-def dead early-clobber $r10, 12 /* clobber */, implicit-def dead early-clobber $r11, 12 /* clobber */, implicit-def dead early-clobber $r12, 12 /* clobber */, implicit-def dead early-clobber $r13, 12 /* clobber */, implicit-def dead early-clobber $r14, 12 /* clobber */, implicit-def dead early-clobber $r15
- ; CHECK: [[MOV32rm:%[0-9]+]]:gr32 = MOV32rm %stack.3, 1, $noreg, 0, $noreg :: (load (s32) from %stack.3)
- ; CHECK: dead [[MOV32rm]].sub_8bit:gr32 = ADD8ri [[MOV32rm]].sub_8bit, -1, implicit-def $eflags
- ; CHECK: [[MOV64rm:%[0-9]+]]:gr64 = MOV64rm %stack.2, 1, $noreg, 0, $noreg :: (load (s64) from %stack.2)
- ; CHECK: [[ADOX64rm:%[0-9]+]]:gr64 = ADOX64rm [[ADOX64rm]], %stack.1, 1, $noreg, 0, $noreg, implicit-def $eflags, implicit killed $eflags :: (load (s64) from %stack.1)
- ; CHECK: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 2, implicit killed $eflags
- ; CHECK: [[MOV64rm:%[0-9]+]]:gr64 = MOV64rm %stack.0, 1, $noreg, 0, $noreg :: (load (s64) from %stack.0)
- ; CHECK: MOV64mr [[MOV64rm]], 1, $noreg, 0, $noreg, [[ADOX64rm]] :: (store (s64) into %ir.3, align 1)
- ; CHECK: $al = COPY [[SETCCr]]
- ; CHECK: RET 0, $al
- %3:gr64 = COPY $rcx
- %2:gr64 = COPY $rdx
- %6:gr64 = COPY $rsi
- %0:gr32 = COPY $edi
- INLINEASM &nop, 1 /* sideeffect attdialect */, 12 /* clobber */, implicit-def dead early-clobber $rax, 12 /* clobber */, implicit-def dead early-clobber $rbx, 12 /* clobber */, implicit-def dead early-clobber $rcx, 12 /* clobber */, implicit-def dead early-clobber $rdx, 12 /* clobber */, implicit-def dead early-clobber $rsi, 12 /* clobber */, implicit-def dead early-clobber $rdi, 12 /* clobber */, implicit-def dead early-clobber $rbp, 12 /* clobber */, implicit-def dead early-clobber $r8, 12 /* clobber */, implicit-def dead early-clobber $r9, 12 /* clobber */, implicit-def dead early-clobber $r10, 12 /* clobber */, implicit-def dead early-clobber $r11, 12 /* clobber */, implicit-def dead early-clobber $r12, 12 /* clobber */, implicit-def dead early-clobber $r13, 12 /* clobber */, implicit-def dead early-clobber $r14, 12 /* clobber */, implicit-def dead early-clobber $r15
- dead %0.sub_8bit:gr32 = ADD8ri %0.sub_8bit, -1, implicit-def $eflags
- %6:gr64 = ADOX64rr %6, %2, implicit-def $eflags, implicit killed $eflags
- %7:gr8 = SETCCr 2, implicit killed $eflags
- MOV64mr %3, 1, $noreg, 0, $noreg, %6 :: (store (s64) into %ir.3, align 1)
- $al = COPY %7
- RET 0, killed $al
-
-...
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