[llvm] f793d99 - [CodeGen] MachineRegisterInfo::constrainRegAttrs - add explicit auto reference to prevent copy.

[Simon Pilgrim via llvm-commits]

Author: Simon Pilgrim
Date: 2023-08-13T14:12:26+01:00
New Revision: f793d99b1172cd0c1a3415473f982f2d4f089ced

URL: https://github.com/llvm/llvm-project/commit/f793d99b1172cd0c1a3415473f982f2d4f089ced
DIFF: https://github.com/llvm/llvm-project/commit/f793d99b1172cd0c1a3415473f982f2d4f089ced.diff

LOG: [CodeGen] MachineRegisterInfo::constrainRegAttrs - add explicit auto reference to prevent copy.

Fixes static analysis warning

Added: 
    

Modified: 
    llvm/lib/CodeGen/MachineRegisterInfo.cpp

Removed: 
    


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diff  --git a/llvm/lib/CodeGen/MachineRegisterInfo.cpp b/llvm/lib/CodeGen/MachineRegisterInfo.cpp
index 0048918fc53be8..7bd8a67ee06c82 100644
--- a/llvm/lib/CodeGen/MachineRegisterInfo.cpp
+++ b/llvm/lib/CodeGen/MachineRegisterInfo.cpp
@@ -96,9 +96,9 @@ MachineRegisterInfo::constrainRegAttrs(Register Reg,
   if (RegTy.isValid() && ConstrainingRegTy.isValid() &&
       RegTy != ConstrainingRegTy)
     return false;
-  const auto ConstrainingRegCB = getRegClassOrRegBank(ConstrainingReg);
+  const auto &ConstrainingRegCB = getRegClassOrRegBank(ConstrainingReg);
   if (!ConstrainingRegCB.isNull()) {
-    const auto RegCB = getRegClassOrRegBank(Reg);
+    const auto &RegCB = getRegClassOrRegBank(Reg);
     if (RegCB.isNull())
       setRegClassOrRegBank(Reg, ConstrainingRegCB);
     else if (isa<const TargetRegisterClass *>(RegCB) !=