[llvm] f9d5541 - [JITLink][RISCV] Correct doc of ADD* fixup expressions, NFC.

[Jonas Hahnfeld via llvm-commits]

Author: Jonas Hahnfeld
Date: 2023-08-12T23:49:01+02:00
New Revision: f9d55410e242761d6d8697def28a86342560a60c

URL: https://github.com/llvm/llvm-project/commit/f9d55410e242761d6d8697def28a86342560a60c
DIFF: https://github.com/llvm/llvm-project/commit/f9d55410e242761d6d8697def28a86342560a60c.diff

LOG: [JITLink][RISCV] Correct doc of ADD* fixup expressions, NFC.

According to the RISC-V ELF psABI, the relocations perform additions,
and this is also what the code implements.

Added: 
    

Modified: 
    llvm/include/llvm/ExecutionEngine/JITLink/riscv.h

Removed: 
    


################################################################################
diff  --git a/llvm/include/llvm/ExecutionEngine/JITLink/riscv.h b/llvm/include/llvm/ExecutionEngine/JITLink/riscv.h
index c884cc28428b5c..cb66289180880c 100644
--- a/llvm/include/llvm/ExecutionEngine/JITLink/riscv.h
+++ b/llvm/include/llvm/ExecutionEngine/JITLink/riscv.h
@@ -110,25 +110,25 @@ enum EdgeKind_riscv : Edge::Kind {
   /// 8 bits label addition
   ///
   /// Fixup expression
-  ///   Fixup <- (Target - *{1}Fixup + Addend)
+  ///   Fixup <- (Target + *{1}Fixup + Addend)
   R_RISCV_ADD8,
 
   /// 16 bits label addition
   ///
   /// Fixup expression
-  ///   Fixup <- (Target - *{2}Fixup + Addend)
+  ///   Fixup <- (Target + *{2}Fixup + Addend)
   R_RISCV_ADD16,
 
   /// 32 bits label addition
   ///
   /// Fixup expression:
-  ///   Fixup <- (Target - *{4}Fixup + Addend)
+  ///   Fixup <- (Target + *{4}Fixup + Addend)
   R_RISCV_ADD32,
 
   /// 64 bits label addition
   ///
   /// Fixup expression:
-  ///   Fixup <- (Target - *{8}Fixup + Addend)
+  ///   Fixup <- (Target + *{8}Fixup + Addend)
   R_RISCV_ADD64,
 
   /// 8 bits label subtraction