[PATCH] D157733: [DAG] NFC: Add getScalarizeExtOrTrunc
Jeffrey Byrnes via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Aug 11 09:29:35 PDT 2023
jrbyrnes created this revision.
jrbyrnes added a reviewer: arsenm.
Herald added subscribers: foad, kerbowa, hiraditya, jvesely.
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Simple function which scalarizes Ops then ExtOrTruncs them according to function parameters
Repository:
rG LLVM Github Monorepo
https://reviews.llvm.org/D157733
Files:
llvm/include/llvm/CodeGen/SelectionDAG.h
llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
llvm/lib/Target/AMDGPU/SIISelLowering.cpp
Index: llvm/lib/Target/AMDGPU/SIISelLowering.cpp
===================================================================
--- llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+++ llvm/lib/Target/AMDGPU/SIISelLowering.cpp
@@ -10948,21 +10948,14 @@
assert(Op.getValueType().isByteSized() &&
OtherOp.getValueType().isByteSized());
- // Handle potential vectors
- Op = DAG.getBitcast(MVT::getIntegerVT(Op.getValueSizeInBits()), Op);
- OtherOp = DAG.getBitcast(
- MVT::getIntegerVT(OtherOp.getValueSizeInBits()), OtherOp);
-
- if (Op.getValueSizeInBits() < 32)
- // If the ultimate src is less than 32 bits, then we will only be
- // using bytes 0: Op.getValueSizeInBytes() - 1 in the or.
- // CalculateByteProvider would not have returned Op as source if we
- // used a byte that is outside its ValueType. Thus, we are free to
- // ANY_EXTEND as the extended bits are dont-cares.
- Op = DAG.getNode(ISD::ANY_EXTEND, DL, MVT::i32, Op);
-
- if (OtherOp.getValueSizeInBits() < 32)
- OtherOp = DAG.getNode(ISD::ANY_EXTEND, DL, MVT::i32, OtherOp);
+ // If the ultimate src is less than 32 bits, then we will only be
+ // using bytes 0: Op.getValueSizeInBytes() - 1 in the or.
+ // CalculateByteProvider would not have returned Op as source if we
+ // used a byte that is outside its ValueType. Thus, we are free to
+ // ANY_EXTEND as the extended bits are dont-cares.
+ Op = DAG.getScalarizeExtOrTrunc(Op, DL, MVT::i32, /*AnyExt=*/true);
+ OtherOp =
+ DAG.getScalarizeExtOrTrunc(OtherOp, DL, MVT::i32, /*AnyExt=*/true);
return DAG.getNode(AMDGPUISD::PERM, DL, MVT::i32, Op, OtherOp,
DAG.getConstant(PermMask, DL, MVT::i32));
Index: llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
===================================================================
--- llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
+++ llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
@@ -1453,6 +1453,24 @@
getNode(ISD::TRUNCATE, DL, VT, Op);
}
+SDValue SelectionDAG::getScalarizeExtOrTrunc(SDValue Op, const SDLoc &DL,
+ EVT VT, bool IsAny,
+ bool IsSigned) {
+ assert(!VT.isVector());
+ auto Type = Op.getValueType();
+ SDValue DestOp;
+ if (Type == VT)
+ return Op;
+ auto Size = Op.getValueSizeInBits();
+ DestOp = getBitcast(MVT::getIntegerVT(Size), Op);
+ if (DestOp.getValueType() == VT)
+ return DestOp;
+
+ return IsAny ? getAnyExtOrTrunc(DestOp, DL, VT)
+ : IsSigned ? getSExtOrTrunc(DestOp, DL, VT)
+ : getZExtOrTrunc(DestOp, DL, VT);
+}
+
SDValue SelectionDAG::getBoolExtOrTrunc(SDValue Op, const SDLoc &SL, EVT VT,
EVT OpVT) {
if (VT.bitsLE(Op.getValueType()))
Index: llvm/include/llvm/CodeGen/SelectionDAG.h
===================================================================
--- llvm/include/llvm/CodeGen/SelectionDAG.h
+++ llvm/include/llvm/CodeGen/SelectionDAG.h
@@ -946,6 +946,15 @@
/// integer type VT, by either zero-extending or truncating it.
SDValue getZExtOrTrunc(SDValue Op, const SDLoc &DL, EVT VT);
+ /// Convert Op, which must have scalar of integer type, to the
+ /// scalar integer type VT. First, convert a vector to a
+ /// correspondingly sized integer type, then either extend or
+ /// truncate it. The priority of extension types is:
+ /// ANY_EXTEND, SIGN_EXTEND, then ZERO_EXTEND depending on
+ /// whether or not \p isAny or \p isSigned is set.
+ SDValue getScalarizeExtOrTrunc(SDValue Op, const SDLoc &DL, EVT VT,
+ bool IsAny = false, bool IsSigned = false);
+
/// Convert Op, which must be of integer type, to the
/// integer type VT, by either sign/zero-extending (depending on IsSigned) or
/// truncating it.
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