[PATCH] D157603: [RISCV] Truncate constants to EleSize when combine store of BUILD_VECTOR
Wang Pengcheng via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Aug 10 22:05:40 PDT 2023
wangpc updated this revision to Diff 549244.
wangpc added a comment.
Use `zextOrTrunc`.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D157603/new/
https://reviews.llvm.org/D157603
Files:
llvm/lib/Target/RISCV/RISCVISelLowering.cpp
llvm/test/CodeGen/RISCV/rvv/pr64588.ll
Index: llvm/test/CodeGen/RISCV/rvv/pr64588.ll
===================================================================
--- /dev/null
+++ llvm/test/CodeGen/RISCV/rvv/pr64588.ll
@@ -0,0 +1,17 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
+; RUN: llc < %s -mtriple riscv64 -mattr=+zve64x | FileCheck %s
+
+define void @bar(ptr %p) {
+; CHECK-LABEL: bar:
+; CHECK: # %bb.0:
+; CHECK-NEXT: sd zero, 0(a0)
+; CHECK-NEXT: sd zero, 8(a0)
+; CHECK-NEXT: ret
+ %v = insertelement <64 x i64> zeroinitializer, i64 0, i32 0
+ %trunc = trunc <64 x i64> %v to <64 x i1>
+ %p1 = getelementptr i8, ptr %p, i32 0
+ %p2 = getelementptr i8, ptr %p, i32 8
+ store <64 x i1> %trunc, ptr %p1
+ store <8 x i8> zeroinitializer, ptr %p2
+ ret void
+}
Index: llvm/lib/Target/RISCV/RISCVISelLowering.cpp
===================================================================
--- llvm/lib/Target/RISCV/RISCVISelLowering.cpp
+++ llvm/lib/Target/RISCV/RISCVISelLowering.cpp
@@ -13479,11 +13479,12 @@
ISD::isBuildVectorOfConstantSDNodes(Val.getNode())) {
// Get the constant vector bits
APInt NewC(Val.getValueSizeInBits(), 0);
+ uint64_t EleSize = Val.getScalarValueSizeInBits();
for (unsigned i = 0; i < Val.getNumOperands(); i++) {
if (Val.getOperand(i).isUndef())
continue;
- NewC.insertBits(Val.getConstantOperandAPInt(i),
- i * Val.getScalarValueSizeInBits());
+ NewC.insertBits(Val.getConstantOperandAPInt(i).zextOrTrunc(EleSize),
+ i * EleSize);
}
MVT NewVT = MVT::getIntegerVT(MemVT.getSizeInBits());
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