[PATCH] D157458: [X86][AMX] Fix virtual register traversing in case of GlobalIsel
Evgenii Kudriashov via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Aug 10 17:53:25 PDT 2023
e-kud added inline comments.
================
Comment at: llvm/test/CodeGen/X86/AMX/amx-fastpreconfig-gisel.mir:4
+
+# GlobalIsel doesn't use all virtual registers and there may be virtual
+# registers without class.
----------------
e-kud wrote:
> pengfei wrote:
> > How can I check it's GlobalIsel MIR? I didn't find anything special in the test.
> Yes, I've put a note
> > Note that %3 doesn't have a class.
>
> ` - { id: 3, class: gpr, preferred-register: '' }`
> So, it is a register without an assigned class, it has only a `RegisterBank` – `gpr` but not a class. When others has `gr64`, `gr8` and so on.
I've answered not existing question previously...
Unfortunately there is no explicit sign about GlobalIsel, however there is implicit:
```
legalized: true
regBankSelected: true
selected: true
```
We have them all set to false in case of SelectionDAG.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D157458/new/
https://reviews.llvm.org/D157458
More information about the llvm-commits
mailing list