[PATCH] D157426: [AMDGPU][True16] Fix ISel for A16 Image Instructions
Joe Nash via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Aug 10 12:22:22 PDT 2023
Joe_Nash marked 2 inline comments as done.
Joe_Nash added inline comments.
================
Comment at: llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp:5887
if (IsA16 || IsG16) {
- if (Intr->NumVAddrs > 1) {
+ if (Intr->NumVAddrs >= 1) {
SmallVector<Register, 4> PackedRegs;
----------------
kosarev wrote:
> kosarev wrote:
> > A comment explaining why it's important to include the case of NumVAddrs == 1 might be helpful.
> What are the cases where this condition is not met?
Good point. The condition is always true because all MIMG have at least one VAddr (afaik).
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D157426/new/
https://reviews.llvm.org/D157426
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