[PATCH] D157633: [MachineScheduler] Account for lane masks in basic block liveins

[Jay Foad via Phabricator via llvm-commits]

foad added a comment.

This seems to have very little effect. I have not looked into why.



================
Comment at: llvm/lib/CodeGen/ScheduleDAGInstrs.cpp:228-229
+          auto [Unit, Mask] = *U;
+          if (Mask.none())
+            Mask = LaneBitmask::getAll();
+          if ((Mask & LI.LaneMask).any() && !Uses.contains(Unit))
----------------
This seems to be some weird special case in the generated LaneMaskLists for registers with a single regunit. Or something.


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D157633/new/

https://reviews.llvm.org/D157633