[PATCH] D157624: [AMDGPU] Treat KIMM32 and KIMM16 operand types as noninlinable
Mirko Brkusanin via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Aug 10 09:16:33 PDT 2023
mbrkusanin updated this revision to Diff 549072.
mbrkusanin edited the summary of this revision.
mbrkusanin added a comment.
- Set FixedSize for FMAMK and FMAAK instructions
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D157624/new/
https://reviews.llvm.org/D157624
Files:
llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
llvm/lib/Target/AMDGPU/VOP2Instructions.td
llvm/test/CodeGen/AMDGPU/code-size-estimate.ll
Index: llvm/test/CodeGen/AMDGPU/code-size-estimate.ll
===================================================================
--- llvm/test/CodeGen/AMDGPU/code-size-estimate.ll
+++ llvm/test/CodeGen/AMDGPU/code-size-estimate.ll
@@ -149,6 +149,7 @@
; GFX9: codeLenInByte = 24
; GFX10: codeLenInByte = 20
+; GFX11: codeLenInByte = 20
define float @v_mul_f32_vop2_frame_index(float %x) {
; GFX9-LABEL: v_mul_f32_vop2_frame_index:
Index: llvm/lib/Target/AMDGPU/VOP2Instructions.td
===================================================================
--- llvm/lib/Target/AMDGPU/VOP2Instructions.td
+++ llvm/lib/Target/AMDGPU/VOP2Instructions.td
@@ -931,7 +931,7 @@
} // End isCommutable = 1
} // End SubtargetPredicate = isGFX11Plus
-let FPDPRounding = 1, isReMaterializable = 1 in {
+let FPDPRounding = 1, isReMaterializable = 1, FixedSize = 1 in {
let SubtargetPredicate = isGFX10Plus, OtherPredicates = [NotHasTrue16BitInsts] in {
def V_FMAMK_F16 : VOP2_Pseudo <"v_fmamk_f16", VOP_MADMK_F16, [], "">;
}
@@ -1089,7 +1089,7 @@
}
} // End AddedComplexity = 30
-let SubtargetPredicate = HasFmaakFmamkF32Insts, isReMaterializable = 1 in {
+let SubtargetPredicate = HasFmaakFmamkF32Insts, isReMaterializable = 1, FixedSize = 1 in {
def V_FMAMK_F32 : VOP2_Pseudo<"v_fmamk_f32", VOP_MADMK_F32, [], "">, VOPD_Component<0x2, "v_fmamk_f32">;
let isCommutable = 1 in
Index: llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
===================================================================
--- llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
+++ llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
@@ -3906,6 +3906,7 @@
}
case AMDGPU::OPERAND_KIMM32:
case AMDGPU::OPERAND_KIMM16:
+ return false;
case AMDGPU::OPERAND_INPUT_MODS:
case MCOI::OPERAND_IMMEDIATE:
// Always embedded in the instruction for free.
-------------- next part --------------
A non-text attachment was scrubbed...
Name: D157624.549072.patch
Type: text/x-patch
Size: 1807 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20230810/cd04355a/attachment.bin>
More information about the llvm-commits
mailing list