[llvm] 2216507 - [SLP]Fix PR64568: Crash during horizontal reduction.

Alexey Bataev via llvm-commits llvm-commits at lists.llvm.org
Thu Aug 10 07:35:38 PDT 2023


Author: Alexey Bataev
Date: 2023-08-10T07:33:16-07:00
New Revision: 22165071711a3b4506487212fe7e0fa1fb0ba6a5

URL: https://github.com/llvm/llvm-project/commit/22165071711a3b4506487212fe7e0fa1fb0ba6a5
DIFF: https://github.com/llvm/llvm-project/commit/22165071711a3b4506487212fe7e0fa1fb0ba6a5.diff

LOG: [SLP]Fix PR64568: Crash during horizontal reduction.

If the reduced values is constant-foldable and was folded to a constant
during previous transformations, need to excluded it from the list of
the reduced values-instructions as non-matchable.

Added: 
    llvm/test/Transforms/SLPVectorizer/X86/reduce-with-folded-to-consts.ll

Modified: 
    llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp b/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
index ecb043a8dde510..085c0605f38049 100644
--- a/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
+++ b/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
@@ -13517,10 +13517,12 @@ class HorizontalReduction {
         // Check if the reduction value was not overriden by the extractelement
         // instruction because of the vectorization and exclude it, if it is not
         // compatible with other values.
-        if (auto *Inst = dyn_cast<Instruction>(RdxVal))
-          if (isVectorLikeInstWithConstOps(Inst) &&
-              (!S.getOpcode() || !S.isOpcodeOrAlt(Inst)))
-            continue;
+        // Also check if the instruction was folded to constant/other value.
+        auto *Inst = dyn_cast<Instruction>(RdxVal);
+        if ((Inst && isVectorLikeInstWithConstOps(Inst) &&
+             (!S.getOpcode() || !S.isOpcodeOrAlt(Inst))) ||
+            (S.getOpcode() && !Inst))
+          continue;
         Candidates.push_back(RdxVal);
         TrackedToOrig.try_emplace(RdxVal, OrigReducedVals[Cnt]);
       }

diff  --git a/llvm/test/Transforms/SLPVectorizer/X86/reduce-with-folded-to-consts.ll b/llvm/test/Transforms/SLPVectorizer/X86/reduce-with-folded-to-consts.ll
new file mode 100644
index 00000000000000..6ab010919ffe8a
--- /dev/null
+++ b/llvm/test/Transforms/SLPVectorizer/X86/reduce-with-folded-to-consts.ll
@@ -0,0 +1,30 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 2
+; RUN: opt -passes=slp-vectorizer -S < %s -o - -mtriple=x86_64-unknown-linux-gnu -mattr=+avx | FileCheck %s
+
+define void @test() {
+; CHECK-LABEL: define void @test
+; CHECK-SAME: () #[[ATTR0:[0-9]+]] {
+; CHECK-NEXT:  bb:
+; CHECK-NEXT:    [[TMP0:%.*]] = call i32 @llvm.vector.reduce.add.v4i32(<4 x i32> zeroinitializer)
+; CHECK-NEXT:    [[OP_RDX2:%.*]] = add i32 0, [[TMP0]]
+; CHECK-NEXT:    store i32 [[OP_RDX2]], ptr null, align 4
+; CHECK-NEXT:    ret void
+;
+bb:
+  %shl183 = shl i32 0, 0
+  %shl187 = shl i32 0, 0
+  %or188 = or i32 %shl183, 0
+  %add189 = add i32 %or188, %shl183
+  %add190 = add i32 0, %add189
+  %shl191 = shl i32 0, 0
+  %or192 = or i32 %shl187, 0
+  %add193 = add i32 %or192, %shl187
+  %add194 = add i32 %add190, %add193
+  %or196 = or i32 %shl191, 0
+  %add198 = add i32 %add194, %or196
+  %shl199 = shl i32 0, 0
+  %or203 = or i32 %shl199, 0
+  %add205 = add i32 %add198, %or203
+  store i32 %add205, ptr null, align 4
+  ret void
+}


        


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