[PATCH] D157279: [CodeGen] Disable FP LD1RX instructions generation for Neoverse-V1

[Paul Walker via Phabricator via llvm-commits]

paulwalker-arm added a comment.

I agree and this is very much a last minute fix for a new regression observed within LLVM 17.  My feeling is that for these sorts of issues we should be using the scheduling models to tell us about bandwidth limitations.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D157279/new/

https://reviews.llvm.org/D157279