[llvm] 8901eb2 - [RISCV] Fix zihintntl test

[Jianjian GUAN via llvm-commits]

Author: Jianjian GUAN
Date: 2023-08-10T17:18:17+08:00
New Revision: 8901eb281f0a41c2a327144d514027c7fcde6bd3

URL: https://github.com/llvm/llvm-project/commit/8901eb281f0a41c2a327144d514027c7fcde6bd3
DIFF: https://github.com/llvm/llvm-project/commit/8901eb281f0a41c2a327144d514027c7fcde6bd3.diff

LOG: [RISCV] Fix zihintntl test

Added: 
    

Modified: 
    llvm/test/CodeGen/RISCV/riscv-func-target-feature.ll

Removed: 
    


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diff  --git a/llvm/test/CodeGen/RISCV/riscv-func-target-feature.ll b/llvm/test/CodeGen/RISCV/riscv-func-target-feature.ll
index 6764b1e850d3fe..a21cc412fb1614 100644
--- a/llvm/test/CodeGen/RISCV/riscv-func-target-feature.ll
+++ b/llvm/test/CodeGen/RISCV/riscv-func-target-feature.ll
@@ -10,8 +10,8 @@ entry:
 }
 
 ; CHECK: .option push
-; CHECK-NEXT: .option arch, +experimental-zihintntl
-define void @test2() "target-features"="+a,+d,+f,+m,+experimental-zihintntl,+zifencei" {
+; CHECK-NEXT: .option arch, +zihintntl
+define void @test2() "target-features"="+a,+d,+f,+m,+zihintntl,+zifencei" {
 ; CHECK-LABEL: test2
 ; CHECK: .option pop
 entry: