[PATCH] D152754: [PowerPC] Correct missue of getOperandConstraint in PPCInstrInfo::commuteInstructionImpl

[Craig Topper via Phabricator via llvm-commits]

This revision was automatically updated to reflect the committed changes.
Closed by commit rGd2e605c92a53: [PowerPC] Correct missue of getOperandConstraint in PPCInstrInfo… (authored by craig.topper).

Changed prior to commit:
  https://reviews.llvm.org/D152754?vs=530679&id=548874#toc

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D152754/new/

https://reviews.llvm.org/D152754

Files:
  llvm/lib/Target/PowerPC/PPCInstrInfo.cpp


Index: llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
===================================================================
--- llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
+++ llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
@@ -1174,8 +1174,8 @@
   // If machine instrs are no longer in two-address forms, update
   // destination register as well.
   if (Reg0 == Reg1) {
-    // Must be two address instruction!
-    assert(MI.getDesc().getOperandConstraint(0, MCOI::TIED_TO) &&
+    // Must be two address instruction (i.e. op1 is tied to op0).
+    assert(MI.getDesc().getOperandConstraint(1, MCOI::TIED_TO) == 0 &&
            "Expecting a two-address instruction!");
     assert(MI.getOperand(0).getSubReg() == SubReg1 && "Tied subreg mismatch");
     Reg2IsKill = false;


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