[llvm] d2e605c - [PowerPC] Correct missue of getOperandConstraint in PPCInstrInfo::commuteInstructionImpl
Craig Topper via llvm-commits
llvm-commits at lists.llvm.org
Wed Aug 9 22:06:11 PDT 2023
Author: Craig Topper
Date: 2023-08-09T21:53:49-07:00
New Revision: d2e605c92a53d61df940970371712f09761dbbdd
URL: https://github.com/llvm/llvm-project/commit/d2e605c92a53d61df940970371712f09761dbbdd
DIFF: https://github.com/llvm/llvm-project/commit/d2e605c92a53d61df940970371712f09761dbbdd.diff
LOG: [PowerPC] Correct missue of getOperandConstraint in PPCInstrInfo::commuteInstructionImpl
getOperandConstraint does not return a bool, it returns an int. It
returns -1 if there is no TIED_TO.
Additionally, TIED_TO is only set on use operands not defs and it
points to the def that the use is tied to. So calling it on operand 0
is guaranteed to return -1.
As far as I can tell this code must have been copied from the
generic implementation prior to 6aa2744bed0b8.o
Unfortunately, this code is not executed in lit tests. I just happened
to notice it while looking for other uses of TIED_TO for something
I was working on.
Reviewed By: nemanjai
Differential Revision: https://reviews.llvm.org/D152754
Added:
Modified:
llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
Removed:
################################################################################
diff --git a/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp b/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
index ac34ea55e6f75e..0ade93eddb19c9 100644
--- a/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
+++ b/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
@@ -1174,8 +1174,8 @@ MachineInstr *PPCInstrInfo::commuteInstructionImpl(MachineInstr &MI, bool NewMI,
// If machine instrs are no longer in two-address forms, update
// destination register as well.
if (Reg0 == Reg1) {
- // Must be two address instruction!
- assert(MI.getDesc().getOperandConstraint(0, MCOI::TIED_TO) &&
+ // Must be two address instruction (i.e. op1 is tied to op0).
+ assert(MI.getDesc().getOperandConstraint(1, MCOI::TIED_TO) == 0 &&
"Expecting a two-address instruction!");
assert(MI.getOperand(0).getSubReg() == SubReg1 && "Tied subreg mismatch");
Reg2IsKill = false;
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