[PATCH] D155267: [DAGCombiner] Change foldAndOrOfSETCC() to optimize and/or patterns with floating points.

[Matt Arsenault via Phabricator via llvm-commits]

arsenm added inline comments.


================
Comment at: llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp:6067
+      return ISD::FMINNUM_IEEE;
+    else if (((CC == ISD::SETGT || CC == ISD::SETGE) &&
+              (OrAndOpcode == ISD::OR)) ||
----------------
no else after return


================
Comment at: llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp:6087-6092
+      if (isNotSNaN)
+        return ISD::FMINNUM_IEEE;
+
+      if (isFMINNUM_FMAXNUM_Supported)
+        return ISD::FMINNUM;
+
----------------
Can this be reordered to try FMINNUM/FMAXNUM first?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D155267/new/

https://reviews.llvm.org/D155267