[PATCH] D157540: [JITLink][AArch32] Fixes for initial AArc32 backend

[Eymen Ünay via Phabricator via llvm-commits]

Eymay created this revision.
Eymay added reviewers: sgraenitz, lhames.
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- Fix masking error in Thumb_Jump24
- Fix halfword comparisons in asserts
- Fix masking error in Thumb_Jump24


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D157540

Files:
  llvm/lib/ExecutionEngine/JITLink/aarch32.cpp


Index: llvm/lib/ExecutionEngine/JITLink/aarch32.cpp
===================================================================
--- llvm/lib/ExecutionEngine/JITLink/aarch32.cpp
+++ llvm/lib/ExecutionEngine/JITLink/aarch32.cpp
@@ -175,7 +175,7 @@
 template <EdgeKind_aarch32 Kind>
 void writeRegister(WritableThumbRelocation &R, HalfWords Reg) {
   static constexpr HalfWords Mask = FixupInfo<Kind>::RegMask;
-  assert((Mask.Hi & Reg.Hi) == Reg.Hi && (Mask.Hi & Reg.Hi) == Reg.Hi &&
+  assert((Mask.Hi & Reg.Hi) == Reg.Hi && (Mask.Lo & Reg.Lo) == Reg.Lo &&
          "Value bits exceed bit range of given mask");
   R.Hi = (R.Hi & ~Mask.Hi) | Reg.Hi;
   R.Lo = (R.Lo & ~Mask.Lo) | Reg.Lo;
@@ -184,7 +184,7 @@
 template <EdgeKind_aarch32 Kind>
 void writeImmediate(WritableThumbRelocation &R, HalfWords Imm) {
   static constexpr HalfWords Mask = FixupInfo<Kind>::ImmMask;
-  assert((Mask.Hi & Imm.Hi) == Imm.Hi && (Mask.Hi & Imm.Hi) == Imm.Hi &&
+  assert((Mask.Hi & Imm.Hi) == Imm.Hi && (Mask.Lo & Imm.Lo) == Imm.Lo &&
          "Value bits exceed bit range of given mask");
   R.Hi = (R.Hi & ~Mask.Hi) | Imm.Hi;
   R.Lo = (R.Lo & ~Mask.Lo) | Imm.Lo;
@@ -242,7 +242,7 @@
   case Thumb_Jump24:
     if (!checkOpcode<Thumb_Jump24>(R))
       return makeUnexpectedOpcodeError(G, R, Kind);
-    if (R.Lo & FixupInfo<Thumb_Jump24>::LoBitConditional)
+    if (~R.Lo & FixupInfo<Thumb_Jump24>::LoBitConditional)
       return make_error<JITLinkError>("Relocation expects an unconditional "
                                       "B.W branch instruction: " +
                                       StringRef(G.getEdgeKindName(Kind)));
@@ -352,7 +352,7 @@
   case Thumb_Jump24: {
     if (!checkOpcode<Thumb_Jump24>(R))
       return makeUnexpectedOpcodeError(G, R, Kind);
-    if (R.Lo & FixupInfo<Thumb_Jump24>::LoBitConditional)
+    if (~R.Lo & FixupInfo<Thumb_Jump24>::LoBitConditional)
       return make_error<JITLinkError>("Relocation expects an unconditional "
                                       "B.W branch instruction: " +
                                       StringRef(G.getEdgeKindName(Kind)));
@@ -471,6 +471,7 @@
 
   switch (K) {
     KIND_NAME_CASE(Data_Delta32)
+    KIND_NAME_CASE(Data_Pointer32)
     KIND_NAME_CASE(Arm_Call)
     KIND_NAME_CASE(Thumb_Call)
     KIND_NAME_CASE(Thumb_Jump24)


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