[PATCH] D157063: [CodeGen] Make the MachineFunctionSplitter pass testable via MIR

[Snehasish Kumar via Phabricator via llvm-commits]

snehasish added a comment.

Is there a specific reason to test MFS (on ARM) with MIR instead of .ll inputs? Only ~11% of the tests in `test/CodeGen/AArch64` are in MIR, the rest are bitcode files. IMO bitcode is much easier to read, maintain and we can reuse most (all?) of the existing tests we have in machine-function-splitter.ll. So my preference would be to use bitcode unless there is a fundamental reason which blocks us from testing with bitcode.


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D157063/new/

https://reviews.llvm.org/D157063