[llvm] c09bdfe - [LV] Require x86 target for interleaved access test
David Spickett via llvm-commits
llvm-commits at lists.llvm.org
Wed Aug 9 02:03:15 PDT 2023
Author: David Spickett
Date: 2023-08-09T09:02:02Z
New Revision: c09bdfe6f77afc1378edaa959d71993b038ca9a7
URL: https://github.com/llvm/llvm-project/commit/c09bdfe6f77afc1378edaa959d71993b038ca9a7
DIFF: https://github.com/llvm/llvm-project/commit/c09bdfe6f77afc1378edaa959d71993b038ca9a7.diff
LOG: [LV] Require x86 target for interleaved access test
This is failing on every Linaro bot that only builds
the Arm or AArch64 targets, adding X86, it passes.
Added:
Modified:
llvm/test/Transforms/LoopVectorize/interleaved-accesses-use-after-free.ll
Removed:
################################################################################
diff --git a/llvm/test/Transforms/LoopVectorize/interleaved-accesses-use-after-free.ll b/llvm/test/Transforms/LoopVectorize/interleaved-accesses-use-after-free.ll
index d5239d5a4e33d5..e680227ea5cae3 100644
--- a/llvm/test/Transforms/LoopVectorize/interleaved-accesses-use-after-free.ll
+++ b/llvm/test/Transforms/LoopVectorize/interleaved-accesses-use-after-free.ll
@@ -1,4 +1,4 @@
-; REQUIRES: asserts
+; REQUIRES: asserts, x86-registered-target
; RUN: opt -passes=loop-vectorize -debug-only=loop-accesses -force-vector-width=4 -disable-output %s 2>&1 | FileCheck %s -check-prefix=LOOP-ACCESS
; RUN: opt -passes=loop-vectorize -debug-only=vectorutils -force-vector-width=4 -disable-output %s 2>&1 | FileCheck %s
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128"
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