[PATCH] D157416: [RISCV][GlobalISel] Legalize multiplication

[Nitin John Raj via Phabricator via llvm-commits]

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Fixed legalization for 2 x XLen without extensions


Legalize multiplication with the +m, +zmmul extensions and without extensions. With extensions, we test for (s7, s8, s16, s32, s48, s64, s96) on rv32 and (s8, s15, s32, s64, s72, s128, s192) on rv64. Without extensions, test (s7, s8, s16, s32) on rv32 and (s8, s15, s16, s32, s64) on rv64. Does not yet work for the type which is 2 times XLen without extensions.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D157416

Files:
  llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp
  llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv32/legalize-mul-ext.mir
  llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv32/legalize-mul.mir
  llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv64/legalize-mul-ext.mir
  llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv64/legalize-mul.mir

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