[PATCH] D157422: [RISCV][GlobalISel] Legalize division and remainder

[Nitin John Raj via Phabricator via llvm-commits]

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Legalize division and remainder. We test for (s7, s8, s16, s32, s48, s64) on rv64 and (s8, s15, s16, s32, s64, s72, s128) on rv64, with and without the +m, +zmmul extensions. We do not handle types with size > 2 x XLen -- these ought to be handled in the IR pass.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D157422

Files:
  llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp
  llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv32/legalize-div.mir
  llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv32/legalize-rem.mir
  llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv64/legalize-div.mir
  llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv64/legalize-rem.mir

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