[PATCH] D155051: [AMDGPU] Add sanity check that fixes bad shift operation in AMD backend

[Matt Arsenault via Phabricator via llvm-commits]

arsenm added a comment.

In D155051#4569610 <https://reviews.llvm.org/D155051#4569610>, @konradkusiak97 wrote:

> I updated the fix to return `false` for this case. I've been trying to create a testcase for this but I'm still trying to figure out exactly how to write it so it triggers this specific case with 0 mask.

You probably just have to write a MIR test


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