[llvm] 943fda5 - [X86] matchTruncateWithPACK - canonically prefer v4i64 -> v4i32 shuffle vs truncation
Simon Pilgrim via llvm-commits
llvm-commits at lists.llvm.org
Tue Aug 8 02:10:05 PDT 2023
Author: Simon Pilgrim
Date: 2023-08-08T10:05:24+01:00
New Revision: 943fda567acb87bea9918b77de3d06f3901b7de2
URL: https://github.com/llvm/llvm-project/commit/943fda567acb87bea9918b77de3d06f3901b7de2
DIFF: https://github.com/llvm/llvm-project/commit/943fda567acb87bea9918b77de3d06f3901b7de2.diff
LOG: [X86] matchTruncateWithPACK - canonically prefer v4i64 -> v4i32 shuffle vs truncation
Pulled out of LowerTruncateVecPackWithSignBits - prefer shuffles unless we can cheaply split the vector. ComputeNumSignBits struggles with vXi64 through bitcasts, so we're usually better off with shuffles.
Added:
Modified:
llvm/lib/Target/X86/X86ISelLowering.cpp
llvm/test/CodeGen/X86/bitcast-and-setcc-256.ll
llvm/test/CodeGen/X86/bitcast-setcc-256.ll
llvm/test/CodeGen/X86/bitcast-vector-bool.ll
llvm/test/CodeGen/X86/combine-srl.ll
llvm/test/CodeGen/X86/icmp-abs-C-vec.ll
llvm/test/CodeGen/X86/ispow2.ll
llvm/test/CodeGen/X86/masked_expandload.ll
llvm/test/CodeGen/X86/masked_load.ll
llvm/test/CodeGen/X86/masked_store.ll
llvm/test/CodeGen/X86/movmsk-cmp.ll
llvm/test/CodeGen/X86/packss.ll
llvm/test/CodeGen/X86/vector-compare-all_of.ll
llvm/test/CodeGen/X86/vector-compare-any_of.ll
llvm/test/CodeGen/X86/vector-compare-results.ll
llvm/test/CodeGen/X86/vector-reduce-or-bool.ll
llvm/test/CodeGen/X86/vector-reduce-xor-bool.ll
Removed:
################################################################################
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index 06925ce45d1b0a..93c3beb72e5096 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -20136,6 +20136,13 @@ static SDValue matchTruncateWithPACK(unsigned &PackOpcode, EVT DstVT,
if (DstVT == MVT::v2i8 && SrcVT == MVT::v2i64 && Subtarget.hasSSSE3())
return SDValue();
+ // Prefer to lower v4i64 -> v4i32 as a shuffle unless we can cheaply
+ // split this for packing.
+ if (SrcVT == MVT::v4i64 && DstVT == MVT::v4i32 &&
+ !isFreeToSplitVector(In.getNode(), DAG) &&
+ (!Subtarget.hasAVX() || DAG.ComputeNumSignBits(In) != 64))
+ return SDValue();
+
// Don't truncate AVX512 targets as multiple PACK nodes stages.
if (Subtarget.hasAVX512() && NumStages > 1)
return SDValue();
@@ -20202,13 +20209,6 @@ static SDValue LowerTruncateVecPackWithSignBits(MVT DstVT, SDValue In,
(DstSVT == MVT::i8 || DstSVT == MVT::i16 || DstSVT == MVT::i32)))
return SDValue();
- // Prefer to lower v4i64 -> v4i32 as a shuffle unless we can cheaply
- // split this for packing.
- if (SrcVT == MVT::v4i64 && DstVT == MVT::v4i32 &&
- !isFreeToSplitVector(In.getNode(), DAG) &&
- (!Subtarget.hasInt256() || DAG.ComputeNumSignBits(In) != 64))
- return SDValue();
-
// If the upper half of the source is undef, then attempt to split and
// only truncate the lower half.
if (DstVT.getSizeInBits() >= 128) {
diff --git a/llvm/test/CodeGen/X86/bitcast-and-setcc-256.ll b/llvm/test/CodeGen/X86/bitcast-and-setcc-256.ll
index e5e9fe3605d3fb..34ef23db345755 100644
--- a/llvm/test/CodeGen/X86/bitcast-and-setcc-256.ll
+++ b/llvm/test/CodeGen/X86/bitcast-and-setcc-256.ll
@@ -950,7 +950,7 @@ define i8 @v4f64_concat_undef(<4 x double> %vec) {
; SSE2-SSSE3-NEXT: xorpd %xmm3, %xmm3
; SSE2-SSSE3-NEXT: cmpltpd %xmm1, %xmm3
; SSE2-SSSE3-NEXT: cmpltpd %xmm0, %xmm2
-; SSE2-SSSE3-NEXT: packssdw %xmm3, %xmm2
+; SSE2-SSSE3-NEXT: shufps {{.*#+}} xmm2 = xmm2[0,2],xmm3[0,2]
; SSE2-SSSE3-NEXT: movmskps %xmm2, %eax
; SSE2-SSSE3-NEXT: # kill: def $al killed $al killed $eax
; SSE2-SSSE3-NEXT: retq
diff --git a/llvm/test/CodeGen/X86/bitcast-setcc-256.ll b/llvm/test/CodeGen/X86/bitcast-setcc-256.ll
index 51b97e20b70b57..656f1e031a7cbe 100644
--- a/llvm/test/CodeGen/X86/bitcast-setcc-256.ll
+++ b/llvm/test/CodeGen/X86/bitcast-setcc-256.ll
@@ -206,21 +206,20 @@ define i4 @v4i64(<4 x i64> %a, <4 x i64> %b) {
; SSE2-SSSE3-NEXT: pxor %xmm4, %xmm3
; SSE2-SSSE3-NEXT: pxor %xmm4, %xmm1
; SSE2-SSSE3-NEXT: movdqa %xmm1, %xmm5
-; SSE2-SSSE3-NEXT: pcmpeqd %xmm3, %xmm5
-; SSE2-SSSE3-NEXT: pcmpgtd %xmm3, %xmm1
-; SSE2-SSSE3-NEXT: pshufd {{.*#+}} xmm3 = xmm1[0,0,2,2]
-; SSE2-SSSE3-NEXT: pand %xmm5, %xmm3
-; SSE2-SSSE3-NEXT: por %xmm1, %xmm3
+; SSE2-SSSE3-NEXT: pcmpgtd %xmm3, %xmm5
; SSE2-SSSE3-NEXT: pxor %xmm4, %xmm2
; SSE2-SSSE3-NEXT: pxor %xmm4, %xmm0
-; SSE2-SSSE3-NEXT: movdqa %xmm0, %xmm1
-; SSE2-SSSE3-NEXT: pcmpeqd %xmm2, %xmm1
-; SSE2-SSSE3-NEXT: pcmpgtd %xmm2, %xmm0
-; SSE2-SSSE3-NEXT: pshufd {{.*#+}} xmm2 = xmm0[0,0,2,2]
-; SSE2-SSSE3-NEXT: pand %xmm1, %xmm2
-; SSE2-SSSE3-NEXT: por %xmm0, %xmm2
-; SSE2-SSSE3-NEXT: packssdw %xmm3, %xmm2
-; SSE2-SSSE3-NEXT: movmskps %xmm2, %eax
+; SSE2-SSSE3-NEXT: movdqa %xmm0, %xmm4
+; SSE2-SSSE3-NEXT: pcmpgtd %xmm2, %xmm4
+; SSE2-SSSE3-NEXT: movdqa %xmm4, %xmm6
+; SSE2-SSSE3-NEXT: shufps {{.*#+}} xmm6 = xmm6[0,2],xmm5[0,2]
+; SSE2-SSSE3-NEXT: pcmpeqd %xmm3, %xmm1
+; SSE2-SSSE3-NEXT: pcmpeqd %xmm2, %xmm0
+; SSE2-SSSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[1,3],xmm1[1,3]
+; SSE2-SSSE3-NEXT: andps %xmm6, %xmm0
+; SSE2-SSSE3-NEXT: shufps {{.*#+}} xmm4 = xmm4[1,3],xmm5[1,3]
+; SSE2-SSSE3-NEXT: orps %xmm0, %xmm4
+; SSE2-SSSE3-NEXT: movmskps %xmm4, %eax
; SSE2-SSSE3-NEXT: # kill: def $al killed $al killed $eax
; SSE2-SSSE3-NEXT: retq
;
@@ -269,7 +268,7 @@ define i4 @v4f64(<4 x double> %a, <4 x double> %b) {
; SSE2-SSSE3: # %bb.0:
; SSE2-SSSE3-NEXT: cmpltpd %xmm1, %xmm3
; SSE2-SSSE3-NEXT: cmpltpd %xmm0, %xmm2
-; SSE2-SSSE3-NEXT: packssdw %xmm3, %xmm2
+; SSE2-SSSE3-NEXT: shufps {{.*#+}} xmm2 = xmm2[0,2],xmm3[0,2]
; SSE2-SSSE3-NEXT: movmskps %xmm2, %eax
; SSE2-SSSE3-NEXT: # kill: def $al killed $al killed $eax
; SSE2-SSSE3-NEXT: retq
@@ -435,7 +434,7 @@ define void @bitcast_8i32_store(ptr %p, <8 x i32> %a0) {
define void @bitcast_4i64_store(ptr %p, <4 x i64> %a0) {
; SSE2-SSSE3-LABEL: bitcast_4i64_store:
; SSE2-SSSE3: # %bb.0:
-; SSE2-SSSE3-NEXT: packssdw %xmm1, %xmm0
+; SSE2-SSSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[1,3],xmm1[1,3]
; SSE2-SSSE3-NEXT: movmskps %xmm0, %eax
; SSE2-SSSE3-NEXT: movb %al, (%rdi)
; SSE2-SSSE3-NEXT: retq
diff --git a/llvm/test/CodeGen/X86/bitcast-vector-bool.ll b/llvm/test/CodeGen/X86/bitcast-vector-bool.ll
index 1b4f965a26454e..501e73c46af9cf 100644
--- a/llvm/test/CodeGen/X86/bitcast-vector-bool.ll
+++ b/llvm/test/CodeGen/X86/bitcast-vector-bool.ll
@@ -289,7 +289,7 @@ define i1 @trunc_v16i8_cmp(<16 x i8> %a0) nounwind {
define i2 @bitcast_v4i64_to_v2i2(<4 x i64> %a0) nounwind {
; SSE-LABEL: bitcast_v4i64_to_v2i2:
; SSE: # %bb.0:
-; SSE-NEXT: packssdw %xmm1, %xmm0
+; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[1,3],xmm1[1,3]
; SSE-NEXT: movmskps %xmm0, %eax
; SSE-NEXT: movl %eax, %ecx
; SSE-NEXT: shrb $2, %cl
diff --git a/llvm/test/CodeGen/X86/combine-srl.ll b/llvm/test/CodeGen/X86/combine-srl.ll
index 380444c62d9f1f..3e0f581ea01a0a 100644
--- a/llvm/test/CodeGen/X86/combine-srl.ll
+++ b/llvm/test/CodeGen/X86/combine-srl.ll
@@ -164,13 +164,31 @@ define <4 x i32> @combine_vec_lshr_trunc_lshr0(<4 x i64> %x) {
; SSE-NEXT: packusdw %xmm1, %xmm0
; SSE-NEXT: retq
;
-; AVX-LABEL: combine_vec_lshr_trunc_lshr0:
-; AVX: # %bb.0:
-; AVX-NEXT: vpsrlq $48, %ymm0, %ymm0
-; AVX-NEXT: vextracti128 $1, %ymm0, %xmm1
-; AVX-NEXT: vpackusdw %xmm1, %xmm0, %xmm0
-; AVX-NEXT: vzeroupper
-; AVX-NEXT: retq
+; AVX2-SLOW-LABEL: combine_vec_lshr_trunc_lshr0:
+; AVX2-SLOW: # %bb.0:
+; AVX2-SLOW-NEXT: vpsrlq $48, %ymm0, %ymm0
+; AVX2-SLOW-NEXT: vextracti128 $1, %ymm0, %xmm1
+; AVX2-SLOW-NEXT: vpackusdw %xmm1, %xmm0, %xmm0
+; AVX2-SLOW-NEXT: vzeroupper
+; AVX2-SLOW-NEXT: retq
+;
+; AVX2-FAST-ALL-LABEL: combine_vec_lshr_trunc_lshr0:
+; AVX2-FAST-ALL: # %bb.0:
+; AVX2-FAST-ALL-NEXT: vpsrlq $48, %ymm0, %ymm0
+; AVX2-FAST-ALL-NEXT: vbroadcasti128 {{.*#+}} ymm1 = [0,2,4,6,0,2,4,6]
+; AVX2-FAST-ALL-NEXT: # ymm1 = mem[0,1,0,1]
+; AVX2-FAST-ALL-NEXT: vpermd %ymm0, %ymm1, %ymm0
+; AVX2-FAST-ALL-NEXT: # kill: def $xmm0 killed $xmm0 killed $ymm0
+; AVX2-FAST-ALL-NEXT: vzeroupper
+; AVX2-FAST-ALL-NEXT: retq
+;
+; AVX2-FAST-PERLANE-LABEL: combine_vec_lshr_trunc_lshr0:
+; AVX2-FAST-PERLANE: # %bb.0:
+; AVX2-FAST-PERLANE-NEXT: vpsrlq $48, %ymm0, %ymm0
+; AVX2-FAST-PERLANE-NEXT: vextracti128 $1, %ymm0, %xmm1
+; AVX2-FAST-PERLANE-NEXT: vpackusdw %xmm1, %xmm0, %xmm0
+; AVX2-FAST-PERLANE-NEXT: vzeroupper
+; AVX2-FAST-PERLANE-NEXT: retq
%1 = lshr <4 x i64> %x, <i64 32, i64 32, i64 32, i64 32>
%2 = trunc <4 x i64> %1 to <4 x i32>
%3 = lshr <4 x i32> %2, <i32 16, i32 16, i32 16, i32 16>
diff --git a/llvm/test/CodeGen/X86/icmp-abs-C-vec.ll b/llvm/test/CodeGen/X86/icmp-abs-C-vec.ll
index e5311beb580796..1e50e5b8112338 100644
--- a/llvm/test/CodeGen/X86/icmp-abs-C-vec.ll
+++ b/llvm/test/CodeGen/X86/icmp-abs-C-vec.ll
@@ -139,12 +139,11 @@ define <4 x i1> @illegal_abs_to_eq_or(<4 x i64> %x) {
; SSE2-NEXT: psubq %xmm2, %xmm1
; SSE2-NEXT: movdqa {{.*#+}} xmm2 = [129,129]
; SSE2-NEXT: pcmpeqd %xmm2, %xmm1
-; SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm1[1,0,3,2]
-; SSE2-NEXT: pand %xmm1, %xmm3
; SSE2-NEXT: pcmpeqd %xmm2, %xmm0
-; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,0,3,2]
-; SSE2-NEXT: pand %xmm1, %xmm0
-; SSE2-NEXT: packssdw %xmm3, %xmm0
+; SSE2-NEXT: movdqa %xmm0, %xmm2
+; SSE2-NEXT: shufps {{.*#+}} xmm2 = xmm2[1,3],xmm1[1,3]
+; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,2],xmm1[0,2]
+; SSE2-NEXT: andps %xmm2, %xmm0
; SSE2-NEXT: retq
%abs = call <4 x i64> @llvm.abs.v4i64(<4 x i64> %x, i1 true)
%cmp = icmp eq <4 x i64> %abs, <i64 129, i64 129, i64 129, i64 129>
@@ -263,14 +262,13 @@ define <4 x i1> @illegal_abs_to_ne_and(<4 x i64> %x) {
; SSE2-NEXT: psubq %xmm2, %xmm1
; SSE2-NEXT: movdqa {{.*#+}} xmm2 = [129,129]
; SSE2-NEXT: pcmpeqd %xmm2, %xmm1
-; SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm1[1,0,3,2]
-; SSE2-NEXT: pand %xmm1, %xmm3
; SSE2-NEXT: pcmpeqd %xmm2, %xmm0
-; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,0,3,2]
-; SSE2-NEXT: pand %xmm1, %xmm0
-; SSE2-NEXT: packssdw %xmm3, %xmm0
+; SSE2-NEXT: movdqa %xmm0, %xmm2
+; SSE2-NEXT: shufps {{.*#+}} xmm2 = xmm2[1,3],xmm1[1,3]
+; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,2],xmm1[0,2]
+; SSE2-NEXT: andps %xmm2, %xmm0
; SSE2-NEXT: pcmpeqd %xmm1, %xmm1
-; SSE2-NEXT: pxor %xmm1, %xmm0
+; SSE2-NEXT: xorps %xmm1, %xmm0
; SSE2-NEXT: retq
%abs = call <4 x i64> @llvm.abs.v4i64(<4 x i64> %x, i1 true)
%cmp = icmp ne <4 x i64> %abs, <i64 129, i64 129, i64 129, i64 129>
diff --git a/llvm/test/CodeGen/X86/ispow2.ll b/llvm/test/CodeGen/X86/ispow2.ll
index 570b29169c8b65..4051e4d7f5b5dc 100644
--- a/llvm/test/CodeGen/X86/ispow2.ll
+++ b/llvm/test/CodeGen/X86/ispow2.ll
@@ -86,14 +86,13 @@ define <4 x i1> @is_pow2_non_zero_4xv64(<4 x i64> %xin) {
; CHECK-NOBMI-NEXT: pand %xmm1, %xmm3
; CHECK-NOBMI-NEXT: pxor %xmm1, %xmm1
; CHECK-NOBMI-NEXT: pcmpeqd %xmm1, %xmm3
-; CHECK-NOBMI-NEXT: pshufd {{.*#+}} xmm4 = xmm3[1,0,3,2]
-; CHECK-NOBMI-NEXT: pand %xmm3, %xmm4
; CHECK-NOBMI-NEXT: paddq %xmm0, %xmm2
; CHECK-NOBMI-NEXT: pand %xmm2, %xmm0
; CHECK-NOBMI-NEXT: pcmpeqd %xmm1, %xmm0
-; CHECK-NOBMI-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,0,3,2]
-; CHECK-NOBMI-NEXT: pand %xmm1, %xmm0
-; CHECK-NOBMI-NEXT: packssdw %xmm4, %xmm0
+; CHECK-NOBMI-NEXT: movdqa %xmm0, %xmm1
+; CHECK-NOBMI-NEXT: shufps {{.*#+}} xmm1 = xmm1[1,3],xmm3[1,3]
+; CHECK-NOBMI-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,2],xmm3[0,2]
+; CHECK-NOBMI-NEXT: andps %xmm1, %xmm0
; CHECK-NOBMI-NEXT: retq
;
; CHECK-AVX2-LABEL: is_pow2_non_zero_4xv64:
@@ -137,16 +136,15 @@ define <4 x i1> @neither_pow2_non_zero_4xv64(<4 x i64> %xin) {
; CHECK-NOBMI-NEXT: pand %xmm1, %xmm3
; CHECK-NOBMI-NEXT: pxor %xmm1, %xmm1
; CHECK-NOBMI-NEXT: pcmpeqd %xmm1, %xmm3
-; CHECK-NOBMI-NEXT: pshufd {{.*#+}} xmm4 = xmm3[1,0,3,2]
-; CHECK-NOBMI-NEXT: pand %xmm3, %xmm4
-; CHECK-NOBMI-NEXT: movdqa %xmm0, %xmm3
-; CHECK-NOBMI-NEXT: paddq %xmm2, %xmm3
-; CHECK-NOBMI-NEXT: pand %xmm3, %xmm0
+; CHECK-NOBMI-NEXT: movdqa %xmm0, %xmm4
+; CHECK-NOBMI-NEXT: paddq %xmm2, %xmm4
+; CHECK-NOBMI-NEXT: pand %xmm4, %xmm0
; CHECK-NOBMI-NEXT: pcmpeqd %xmm1, %xmm0
-; CHECK-NOBMI-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,0,3,2]
-; CHECK-NOBMI-NEXT: pand %xmm1, %xmm0
-; CHECK-NOBMI-NEXT: packssdw %xmm4, %xmm0
-; CHECK-NOBMI-NEXT: pxor %xmm2, %xmm0
+; CHECK-NOBMI-NEXT: movdqa %xmm0, %xmm1
+; CHECK-NOBMI-NEXT: shufps {{.*#+}} xmm1 = xmm1[1,3],xmm3[1,3]
+; CHECK-NOBMI-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,2],xmm3[0,2]
+; CHECK-NOBMI-NEXT: andps %xmm1, %xmm0
+; CHECK-NOBMI-NEXT: xorps %xmm2, %xmm0
; CHECK-NOBMI-NEXT: retq
;
; CHECK-AVX2-LABEL: neither_pow2_non_zero_4xv64:
@@ -207,7 +205,7 @@ define <4 x i1> @neither_pow2_non_zero_4xv64_x_maybe_z(<4 x i64> %x) {
; CHECK-NOBMI-NEXT: pand %xmm2, %xmm0
; CHECK-NOBMI-NEXT: pxor %xmm3, %xmm0
; CHECK-NOBMI-NEXT: por %xmm5, %xmm0
-; CHECK-NOBMI-NEXT: packssdw %xmm1, %xmm0
+; CHECK-NOBMI-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,2],xmm1[0,2]
; CHECK-NOBMI-NEXT: retq
;
; CHECK-AVX2-LABEL: neither_pow2_non_zero_4xv64_x_maybe_z:
diff --git a/llvm/test/CodeGen/X86/masked_expandload.ll b/llvm/test/CodeGen/X86/masked_expandload.ll
index cafbc7b5a8ac1b..46b1fa5dd2757e 100644
--- a/llvm/test/CodeGen/X86/masked_expandload.ll
+++ b/llvm/test/CodeGen/X86/masked_expandload.ll
@@ -104,13 +104,12 @@ define <4 x double> @expandload_v4f64_v4i64(ptr %base, <4 x double> %src0, <4 x
; SSE2: ## %bb.0:
; SSE2-NEXT: pxor %xmm4, %xmm4
; SSE2-NEXT: pcmpeqd %xmm4, %xmm3
-; SSE2-NEXT: pshufd {{.*#+}} xmm5 = xmm3[1,0,3,2]
-; SSE2-NEXT: pand %xmm3, %xmm5
; SSE2-NEXT: pcmpeqd %xmm4, %xmm2
-; SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm2[1,0,3,2]
-; SSE2-NEXT: pand %xmm2, %xmm3
-; SSE2-NEXT: packssdw %xmm5, %xmm3
-; SSE2-NEXT: movmskps %xmm3, %eax
+; SSE2-NEXT: movdqa %xmm2, %xmm4
+; SSE2-NEXT: shufps {{.*#+}} xmm4 = xmm4[1,3],xmm3[1,3]
+; SSE2-NEXT: shufps {{.*#+}} xmm2 = xmm2[0,2],xmm3[0,2]
+; SSE2-NEXT: andps %xmm4, %xmm2
+; SSE2-NEXT: movmskps %xmm2, %eax
; SSE2-NEXT: testb $1, %al
; SSE2-NEXT: jne LBB1_1
; SSE2-NEXT: ## %bb.2: ## %else
diff --git a/llvm/test/CodeGen/X86/masked_load.ll b/llvm/test/CodeGen/X86/masked_load.ll
index 7e47aaba874719..60db806450ebcb 100644
--- a/llvm/test/CodeGen/X86/masked_load.ll
+++ b/llvm/test/CodeGen/X86/masked_load.ll
@@ -310,13 +310,12 @@ define <4 x double> @load_v4f64_v4i64(<4 x i64> %trigger, ptr %addr, <4 x double
; SSE2: ## %bb.0:
; SSE2-NEXT: pxor %xmm4, %xmm4
; SSE2-NEXT: pcmpeqd %xmm4, %xmm1
-; SSE2-NEXT: pshufd {{.*#+}} xmm5 = xmm1[1,0,3,2]
-; SSE2-NEXT: pand %xmm1, %xmm5
; SSE2-NEXT: pcmpeqd %xmm4, %xmm0
-; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,0,3,2]
-; SSE2-NEXT: pand %xmm0, %xmm1
-; SSE2-NEXT: packssdw %xmm5, %xmm1
-; SSE2-NEXT: movmskps %xmm1, %eax
+; SSE2-NEXT: movdqa %xmm0, %xmm4
+; SSE2-NEXT: shufps {{.*#+}} xmm4 = xmm4[1,3],xmm1[1,3]
+; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,2],xmm1[0,2]
+; SSE2-NEXT: andps %xmm4, %xmm0
+; SSE2-NEXT: movmskps %xmm0, %eax
; SSE2-NEXT: testb $1, %al
; SSE2-NEXT: jne LBB4_1
; SSE2-NEXT: ## %bb.2: ## %else
@@ -1633,13 +1632,12 @@ define <4 x i64> @load_v4i64_v4i64(<4 x i64> %trigger, ptr %addr, <4 x i64> %dst
; SSE2: ## %bb.0:
; SSE2-NEXT: pxor %xmm4, %xmm4
; SSE2-NEXT: pcmpeqd %xmm4, %xmm1
-; SSE2-NEXT: pshufd {{.*#+}} xmm5 = xmm1[1,0,3,2]
-; SSE2-NEXT: pand %xmm1, %xmm5
; SSE2-NEXT: pcmpeqd %xmm4, %xmm0
-; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,0,3,2]
-; SSE2-NEXT: pand %xmm0, %xmm1
-; SSE2-NEXT: packssdw %xmm5, %xmm1
-; SSE2-NEXT: movmskps %xmm1, %eax
+; SSE2-NEXT: movdqa %xmm0, %xmm4
+; SSE2-NEXT: shufps {{.*#+}} xmm4 = xmm4[1,3],xmm1[1,3]
+; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,2],xmm1[0,2]
+; SSE2-NEXT: andps %xmm4, %xmm0
+; SSE2-NEXT: movmskps %xmm0, %eax
; SSE2-NEXT: testb $1, %al
; SSE2-NEXT: jne LBB14_1
; SSE2-NEXT: ## %bb.2: ## %else
diff --git a/llvm/test/CodeGen/X86/masked_store.ll b/llvm/test/CodeGen/X86/masked_store.ll
index ea4ce2681a801a..5d993d71b4099f 100644
--- a/llvm/test/CodeGen/X86/masked_store.ll
+++ b/llvm/test/CodeGen/X86/masked_store.ll
@@ -107,38 +107,71 @@ define void @store_v2f64_v2i64(<2 x i64> %trigger, ptr %addr, <2 x double> %val)
}
define void @store_v4f64_v4i64(<4 x i64> %trigger, ptr %addr, <4 x double> %val) {
-; SSE-LABEL: store_v4f64_v4i64:
-; SSE: ## %bb.0:
-; SSE-NEXT: packssdw %xmm1, %xmm0
-; SSE-NEXT: movmskps %xmm0, %eax
-; SSE-NEXT: testb $1, %al
-; SSE-NEXT: jne LBB2_1
-; SSE-NEXT: ## %bb.2: ## %else
-; SSE-NEXT: testb $2, %al
-; SSE-NEXT: jne LBB2_3
-; SSE-NEXT: LBB2_4: ## %else2
-; SSE-NEXT: testb $4, %al
-; SSE-NEXT: jne LBB2_5
-; SSE-NEXT: LBB2_6: ## %else4
-; SSE-NEXT: testb $8, %al
-; SSE-NEXT: jne LBB2_7
-; SSE-NEXT: LBB2_8: ## %else6
-; SSE-NEXT: retq
-; SSE-NEXT: LBB2_1: ## %cond.store
-; SSE-NEXT: movlps %xmm2, (%rdi)
-; SSE-NEXT: testb $2, %al
-; SSE-NEXT: je LBB2_4
-; SSE-NEXT: LBB2_3: ## %cond.store1
-; SSE-NEXT: movhps %xmm2, 8(%rdi)
-; SSE-NEXT: testb $4, %al
-; SSE-NEXT: je LBB2_6
-; SSE-NEXT: LBB2_5: ## %cond.store3
-; SSE-NEXT: movlps %xmm3, 16(%rdi)
-; SSE-NEXT: testb $8, %al
-; SSE-NEXT: je LBB2_8
-; SSE-NEXT: LBB2_7: ## %cond.store5
-; SSE-NEXT: movhps %xmm3, 24(%rdi)
-; SSE-NEXT: retq
+; SSE2-LABEL: store_v4f64_v4i64:
+; SSE2: ## %bb.0:
+; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[1,3],xmm1[1,3]
+; SSE2-NEXT: movmskps %xmm0, %eax
+; SSE2-NEXT: testb $1, %al
+; SSE2-NEXT: jne LBB2_1
+; SSE2-NEXT: ## %bb.2: ## %else
+; SSE2-NEXT: testb $2, %al
+; SSE2-NEXT: jne LBB2_3
+; SSE2-NEXT: LBB2_4: ## %else2
+; SSE2-NEXT: testb $4, %al
+; SSE2-NEXT: jne LBB2_5
+; SSE2-NEXT: LBB2_6: ## %else4
+; SSE2-NEXT: testb $8, %al
+; SSE2-NEXT: jne LBB2_7
+; SSE2-NEXT: LBB2_8: ## %else6
+; SSE2-NEXT: retq
+; SSE2-NEXT: LBB2_1: ## %cond.store
+; SSE2-NEXT: movlps %xmm2, (%rdi)
+; SSE2-NEXT: testb $2, %al
+; SSE2-NEXT: je LBB2_4
+; SSE2-NEXT: LBB2_3: ## %cond.store1
+; SSE2-NEXT: movhps %xmm2, 8(%rdi)
+; SSE2-NEXT: testb $4, %al
+; SSE2-NEXT: je LBB2_6
+; SSE2-NEXT: LBB2_5: ## %cond.store3
+; SSE2-NEXT: movlps %xmm3, 16(%rdi)
+; SSE2-NEXT: testb $8, %al
+; SSE2-NEXT: je LBB2_8
+; SSE2-NEXT: LBB2_7: ## %cond.store5
+; SSE2-NEXT: movhps %xmm3, 24(%rdi)
+; SSE2-NEXT: retq
+;
+; SSE4-LABEL: store_v4f64_v4i64:
+; SSE4: ## %bb.0:
+; SSE4-NEXT: packssdw %xmm1, %xmm0
+; SSE4-NEXT: movmskps %xmm0, %eax
+; SSE4-NEXT: testb $1, %al
+; SSE4-NEXT: jne LBB2_1
+; SSE4-NEXT: ## %bb.2: ## %else
+; SSE4-NEXT: testb $2, %al
+; SSE4-NEXT: jne LBB2_3
+; SSE4-NEXT: LBB2_4: ## %else2
+; SSE4-NEXT: testb $4, %al
+; SSE4-NEXT: jne LBB2_5
+; SSE4-NEXT: LBB2_6: ## %else4
+; SSE4-NEXT: testb $8, %al
+; SSE4-NEXT: jne LBB2_7
+; SSE4-NEXT: LBB2_8: ## %else6
+; SSE4-NEXT: retq
+; SSE4-NEXT: LBB2_1: ## %cond.store
+; SSE4-NEXT: movlps %xmm2, (%rdi)
+; SSE4-NEXT: testb $2, %al
+; SSE4-NEXT: je LBB2_4
+; SSE4-NEXT: LBB2_3: ## %cond.store1
+; SSE4-NEXT: movhps %xmm2, 8(%rdi)
+; SSE4-NEXT: testb $4, %al
+; SSE4-NEXT: je LBB2_6
+; SSE4-NEXT: LBB2_5: ## %cond.store3
+; SSE4-NEXT: movlps %xmm3, 16(%rdi)
+; SSE4-NEXT: testb $8, %al
+; SSE4-NEXT: je LBB2_8
+; SSE4-NEXT: LBB2_7: ## %cond.store5
+; SSE4-NEXT: movhps %xmm3, 24(%rdi)
+; SSE4-NEXT: retq
;
; AVX1OR2-LABEL: store_v4f64_v4i64:
; AVX1OR2: ## %bb.0:
@@ -968,7 +1001,7 @@ define void @store_v2i64_v2i64(<2 x i64> %trigger, ptr %addr, <2 x i64> %val) {
define void @store_v4i64_v4i64(<4 x i64> %trigger, ptr %addr, <4 x i64> %val) {
; SSE2-LABEL: store_v4i64_v4i64:
; SSE2: ## %bb.0:
-; SSE2-NEXT: packssdw %xmm1, %xmm0
+; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[1,3],xmm1[1,3]
; SSE2-NEXT: movmskps %xmm0, %eax
; SSE2-NEXT: testb $1, %al
; SSE2-NEXT: jne LBB8_1
diff --git a/llvm/test/CodeGen/X86/movmsk-cmp.ll b/llvm/test/CodeGen/X86/movmsk-cmp.ll
index 6ed44771f703e5..95db89049b05a7 100644
--- a/llvm/test/CodeGen/X86/movmsk-cmp.ll
+++ b/llvm/test/CodeGen/X86/movmsk-cmp.ll
@@ -784,7 +784,7 @@ define i1 @allzeros_v16i32_sign(<16 x i32> %arg) {
define i1 @allones_v4i64_sign(<4 x i64> %arg) {
; SSE-LABEL: allones_v4i64_sign:
; SSE: # %bb.0:
-; SSE-NEXT: packssdw %xmm1, %xmm0
+; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[1,3],xmm1[1,3]
; SSE-NEXT: movmskps %xmm0, %eax
; SSE-NEXT: cmpl $15, %eax
; SSE-NEXT: sete %al
@@ -823,7 +823,7 @@ define i1 @allones_v4i64_sign(<4 x i64> %arg) {
define i1 @allzeros_v4i64_sign(<4 x i64> %arg) {
; SSE-LABEL: allzeros_v4i64_sign:
; SSE: # %bb.0:
-; SSE-NEXT: packssdw %xmm1, %xmm0
+; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[1,3],xmm1[1,3]
; SSE-NEXT: movmskps %xmm0, %eax
; SSE-NEXT: testl %eax, %eax
; SSE-NEXT: sete %al
@@ -2071,7 +2071,7 @@ define i1 @allones_v4i64_and1(<4 x i64> %arg) {
; SSE: # %bb.0:
; SSE-NEXT: psllq $63, %xmm1
; SSE-NEXT: psllq $63, %xmm0
-; SSE-NEXT: packssdw %xmm1, %xmm0
+; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[1,3],xmm1[1,3]
; SSE-NEXT: movmskps %xmm0, %eax
; SSE-NEXT: cmpl $15, %eax
; SSE-NEXT: sete %al
@@ -3272,7 +3272,7 @@ define i1 @allones_v4i64_and4(<4 x i64> %arg) {
; SSE: # %bb.0:
; SSE-NEXT: psllq $61, %xmm1
; SSE-NEXT: psllq $61, %xmm0
-; SSE-NEXT: packssdw %xmm1, %xmm0
+; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[1,3],xmm1[1,3]
; SSE-NEXT: movmskps %xmm0, %eax
; SSE-NEXT: cmpl $15, %eax
; SSE-NEXT: sete %al
@@ -3576,7 +3576,7 @@ define i32 @movmskps(<4 x float> %x) {
define i32 @movmskpd256(<4 x double> %x) {
; SSE-LABEL: movmskpd256:
; SSE: # %bb.0:
-; SSE-NEXT: packssdw %xmm1, %xmm0
+; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[1,3],xmm1[1,3]
; SSE-NEXT: movmskps %xmm0, %eax
; SSE-NEXT: retq
;
diff --git a/llvm/test/CodeGen/X86/packss.ll b/llvm/test/CodeGen/X86/packss.ll
index 6a37dd6db294c9..ec14c95f0fc625 100644
--- a/llvm/test/CodeGen/X86/packss.ll
+++ b/llvm/test/CodeGen/X86/packss.ll
@@ -11,11 +11,9 @@
define <4 x i32> @trunc_ashr_v4i64(<4 x i64> %a) nounwind {
; SSE2-LABEL: trunc_ashr_v4i64:
; SSE2: # %bb.0:
-; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[1,1,3,3]
; SSE2-NEXT: psrad $31, %xmm1
-; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,3,3]
; SSE2-NEXT: psrad $31, %xmm0
-; SSE2-NEXT: packssdw %xmm1, %xmm0
+; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[1,3],xmm1[1,3]
; SSE2-NEXT: ret{{[l|q]}}
;
; SSE4-LABEL: trunc_ashr_v4i64:
diff --git a/llvm/test/CodeGen/X86/vector-compare-all_of.ll b/llvm/test/CodeGen/X86/vector-compare-all_of.ll
index 4c50e2938cfa65..ec7dca4285a355 100644
--- a/llvm/test/CodeGen/X86/vector-compare-all_of.ll
+++ b/llvm/test/CodeGen/X86/vector-compare-all_of.ll
@@ -90,7 +90,7 @@ define i64 @test_v4f64_legal_sext(<4 x double> %a0, <4 x double> %a1) {
; SSE: # %bb.0:
; SSE-NEXT: cmpltpd %xmm1, %xmm3
; SSE-NEXT: cmpltpd %xmm0, %xmm2
-; SSE-NEXT: packssdw %xmm3, %xmm2
+; SSE-NEXT: shufps {{.*#+}} xmm2 = xmm2[0,2],xmm3[0,2]
; SSE-NEXT: movmskps %xmm2, %ecx
; SSE-NEXT: xorl %eax, %eax
; SSE-NEXT: cmpl $15, %ecx
@@ -400,21 +400,20 @@ define i64 @test_v4i64_legal_sext(<4 x i64> %a0, <4 x i64> %a1) {
; SSE2-NEXT: pxor %xmm4, %xmm3
; SSE2-NEXT: pxor %xmm4, %xmm1
; SSE2-NEXT: movdqa %xmm1, %xmm5
-; SSE2-NEXT: pcmpeqd %xmm3, %xmm5
-; SSE2-NEXT: pcmpgtd %xmm3, %xmm1
-; SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm1[0,0,2,2]
-; SSE2-NEXT: pand %xmm5, %xmm3
-; SSE2-NEXT: por %xmm1, %xmm3
+; SSE2-NEXT: pcmpgtd %xmm3, %xmm5
; SSE2-NEXT: pxor %xmm4, %xmm2
; SSE2-NEXT: pxor %xmm4, %xmm0
-; SSE2-NEXT: movdqa %xmm0, %xmm1
-; SSE2-NEXT: pcmpeqd %xmm2, %xmm1
-; SSE2-NEXT: pcmpgtd %xmm2, %xmm0
-; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm0[0,0,2,2]
-; SSE2-NEXT: pand %xmm1, %xmm2
-; SSE2-NEXT: por %xmm0, %xmm2
-; SSE2-NEXT: packssdw %xmm3, %xmm2
-; SSE2-NEXT: movmskps %xmm2, %ecx
+; SSE2-NEXT: movdqa %xmm0, %xmm4
+; SSE2-NEXT: pcmpgtd %xmm2, %xmm4
+; SSE2-NEXT: movdqa %xmm4, %xmm6
+; SSE2-NEXT: shufps {{.*#+}} xmm6 = xmm6[0,2],xmm5[0,2]
+; SSE2-NEXT: pcmpeqd %xmm3, %xmm1
+; SSE2-NEXT: pcmpeqd %xmm2, %xmm0
+; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[1,3],xmm1[1,3]
+; SSE2-NEXT: andps %xmm6, %xmm0
+; SSE2-NEXT: shufps {{.*#+}} xmm4 = xmm4[1,3],xmm5[1,3]
+; SSE2-NEXT: orps %xmm0, %xmm4
+; SSE2-NEXT: movmskps %xmm4, %ecx
; SSE2-NEXT: xorl %eax, %eax
; SSE2-NEXT: cmpl $15, %ecx
; SSE2-NEXT: sete %al
@@ -1021,7 +1020,7 @@ define i1 @bool_reduction_v4f64(<4 x double> %x, <4 x double> %y) {
; SSE: # %bb.0:
; SSE-NEXT: cmplepd %xmm1, %xmm3
; SSE-NEXT: cmplepd %xmm0, %xmm2
-; SSE-NEXT: packssdw %xmm3, %xmm2
+; SSE-NEXT: shufps {{.*#+}} xmm2 = xmm2[0,2],xmm3[0,2]
; SSE-NEXT: movmskps %xmm2, %eax
; SSE-NEXT: cmpl $15, %eax
; SSE-NEXT: sete %al
@@ -1278,21 +1277,20 @@ define i1 @bool_reduction_v4i64(<4 x i64> %x, <4 x i64> %y) {
; SSE2-NEXT: pxor %xmm4, %xmm1
; SSE2-NEXT: pxor %xmm4, %xmm3
; SSE2-NEXT: movdqa %xmm3, %xmm5
-; SSE2-NEXT: pcmpeqd %xmm1, %xmm5
-; SSE2-NEXT: pcmpgtd %xmm1, %xmm3
-; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm3[0,0,2,2]
-; SSE2-NEXT: pand %xmm5, %xmm1
-; SSE2-NEXT: por %xmm3, %xmm1
+; SSE2-NEXT: pcmpgtd %xmm1, %xmm5
; SSE2-NEXT: pxor %xmm4, %xmm0
; SSE2-NEXT: pxor %xmm4, %xmm2
-; SSE2-NEXT: movdqa %xmm2, %xmm3
-; SSE2-NEXT: pcmpeqd %xmm0, %xmm3
-; SSE2-NEXT: pcmpgtd %xmm0, %xmm2
-; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm2[0,0,2,2]
-; SSE2-NEXT: pand %xmm3, %xmm0
-; SSE2-NEXT: por %xmm2, %xmm0
-; SSE2-NEXT: packssdw %xmm1, %xmm0
-; SSE2-NEXT: movmskps %xmm0, %eax
+; SSE2-NEXT: movdqa %xmm2, %xmm4
+; SSE2-NEXT: pcmpgtd %xmm0, %xmm4
+; SSE2-NEXT: movdqa %xmm4, %xmm6
+; SSE2-NEXT: shufps {{.*#+}} xmm6 = xmm6[0,2],xmm5[0,2]
+; SSE2-NEXT: pcmpeqd %xmm1, %xmm3
+; SSE2-NEXT: pcmpeqd %xmm0, %xmm2
+; SSE2-NEXT: shufps {{.*#+}} xmm2 = xmm2[1,3],xmm3[1,3]
+; SSE2-NEXT: andps %xmm6, %xmm2
+; SSE2-NEXT: shufps {{.*#+}} xmm4 = xmm4[1,3],xmm5[1,3]
+; SSE2-NEXT: orps %xmm2, %xmm4
+; SSE2-NEXT: movmskps %xmm4, %eax
; SSE2-NEXT: cmpl $15, %eax
; SSE2-NEXT: sete %al
; SSE2-NEXT: retq
diff --git a/llvm/test/CodeGen/X86/vector-compare-any_of.ll b/llvm/test/CodeGen/X86/vector-compare-any_of.ll
index eb00a36f905af5..951bcfa8fc1b74 100644
--- a/llvm/test/CodeGen/X86/vector-compare-any_of.ll
+++ b/llvm/test/CodeGen/X86/vector-compare-any_of.ll
@@ -67,7 +67,7 @@ define i64 @test_v4f64_legal_sext(<4 x double> %a0, <4 x double> %a1) {
; SSE: # %bb.0:
; SSE-NEXT: cmpltpd %xmm1, %xmm3
; SSE-NEXT: cmpltpd %xmm0, %xmm2
-; SSE-NEXT: packssdw %xmm3, %xmm2
+; SSE-NEXT: shufps {{.*#+}} xmm2 = xmm2[0,2],xmm3[0,2]
; SSE-NEXT: movmskps %xmm2, %ecx
; SSE-NEXT: xorl %eax, %eax
; SSE-NEXT: negl %ecx
@@ -347,21 +347,20 @@ define i64 @test_v4i64_legal_sext(<4 x i64> %a0, <4 x i64> %a1) {
; SSE2-NEXT: pxor %xmm4, %xmm3
; SSE2-NEXT: pxor %xmm4, %xmm1
; SSE2-NEXT: movdqa %xmm1, %xmm5
-; SSE2-NEXT: pcmpeqd %xmm3, %xmm5
-; SSE2-NEXT: pcmpgtd %xmm3, %xmm1
-; SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm1[0,0,2,2]
-; SSE2-NEXT: pand %xmm5, %xmm3
-; SSE2-NEXT: por %xmm1, %xmm3
+; SSE2-NEXT: pcmpgtd %xmm3, %xmm5
; SSE2-NEXT: pxor %xmm4, %xmm2
; SSE2-NEXT: pxor %xmm4, %xmm0
-; SSE2-NEXT: movdqa %xmm0, %xmm1
-; SSE2-NEXT: pcmpeqd %xmm2, %xmm1
-; SSE2-NEXT: pcmpgtd %xmm2, %xmm0
-; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm0[0,0,2,2]
-; SSE2-NEXT: pand %xmm1, %xmm2
-; SSE2-NEXT: por %xmm0, %xmm2
-; SSE2-NEXT: packssdw %xmm3, %xmm2
-; SSE2-NEXT: movmskps %xmm2, %ecx
+; SSE2-NEXT: movdqa %xmm0, %xmm4
+; SSE2-NEXT: pcmpgtd %xmm2, %xmm4
+; SSE2-NEXT: movdqa %xmm4, %xmm6
+; SSE2-NEXT: shufps {{.*#+}} xmm6 = xmm6[0,2],xmm5[0,2]
+; SSE2-NEXT: pcmpeqd %xmm3, %xmm1
+; SSE2-NEXT: pcmpeqd %xmm2, %xmm0
+; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[1,3],xmm1[1,3]
+; SSE2-NEXT: andps %xmm6, %xmm0
+; SSE2-NEXT: shufps {{.*#+}} xmm4 = xmm4[1,3],xmm5[1,3]
+; SSE2-NEXT: orps %xmm0, %xmm4
+; SSE2-NEXT: movmskps %xmm4, %ecx
; SSE2-NEXT: xorl %eax, %eax
; SSE2-NEXT: negl %ecx
; SSE2-NEXT: sbbq %rax, %rax
@@ -898,7 +897,7 @@ define i1 @bool_reduction_v4f64(<4 x double> %x, <4 x double> %y) {
; SSE: # %bb.0:
; SSE-NEXT: cmplepd %xmm1, %xmm3
; SSE-NEXT: cmplepd %xmm0, %xmm2
-; SSE-NEXT: packssdw %xmm3, %xmm2
+; SSE-NEXT: shufps {{.*#+}} xmm2 = xmm2[0,2],xmm3[0,2]
; SSE-NEXT: movmskps %xmm2, %eax
; SSE-NEXT: testl %eax, %eax
; SSE-NEXT: setne %al
@@ -1118,21 +1117,20 @@ define i1 @bool_reduction_v4i64(<4 x i64> %x, <4 x i64> %y) {
; SSE2-NEXT: pxor %xmm4, %xmm1
; SSE2-NEXT: pxor %xmm4, %xmm3
; SSE2-NEXT: movdqa %xmm3, %xmm5
-; SSE2-NEXT: pcmpeqd %xmm1, %xmm5
-; SSE2-NEXT: pcmpgtd %xmm1, %xmm3
-; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm3[0,0,2,2]
-; SSE2-NEXT: pand %xmm5, %xmm1
-; SSE2-NEXT: por %xmm3, %xmm1
+; SSE2-NEXT: pcmpgtd %xmm1, %xmm5
; SSE2-NEXT: pxor %xmm4, %xmm0
; SSE2-NEXT: pxor %xmm4, %xmm2
-; SSE2-NEXT: movdqa %xmm2, %xmm3
-; SSE2-NEXT: pcmpeqd %xmm0, %xmm3
-; SSE2-NEXT: pcmpgtd %xmm0, %xmm2
-; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm2[0,0,2,2]
-; SSE2-NEXT: pand %xmm3, %xmm0
-; SSE2-NEXT: por %xmm2, %xmm0
-; SSE2-NEXT: packssdw %xmm1, %xmm0
-; SSE2-NEXT: movmskps %xmm0, %eax
+; SSE2-NEXT: movdqa %xmm2, %xmm4
+; SSE2-NEXT: pcmpgtd %xmm0, %xmm4
+; SSE2-NEXT: movdqa %xmm4, %xmm6
+; SSE2-NEXT: shufps {{.*#+}} xmm6 = xmm6[0,2],xmm5[0,2]
+; SSE2-NEXT: pcmpeqd %xmm1, %xmm3
+; SSE2-NEXT: pcmpeqd %xmm0, %xmm2
+; SSE2-NEXT: shufps {{.*#+}} xmm2 = xmm2[1,3],xmm3[1,3]
+; SSE2-NEXT: andps %xmm6, %xmm2
+; SSE2-NEXT: shufps {{.*#+}} xmm4 = xmm4[1,3],xmm5[1,3]
+; SSE2-NEXT: orps %xmm2, %xmm4
+; SSE2-NEXT: movmskps %xmm4, %eax
; SSE2-NEXT: testl %eax, %eax
; SSE2-NEXT: setne %al
; SSE2-NEXT: retq
diff --git a/llvm/test/CodeGen/X86/vector-compare-results.ll b/llvm/test/CodeGen/X86/vector-compare-results.ll
index 745c59baf710cb..2c7f65064a5e65 100644
--- a/llvm/test/CodeGen/X86/vector-compare-results.ll
+++ b/llvm/test/CodeGen/X86/vector-compare-results.ll
@@ -121,8 +121,8 @@ define <4 x i1> @test_cmp_v4f64(<4 x double> %a0, <4 x double> %a1) nounwind {
; SSE: # %bb.0:
; SSE-NEXT: cmpltpd %xmm1, %xmm3
; SSE-NEXT: cmpltpd %xmm0, %xmm2
-; SSE-NEXT: packssdw %xmm3, %xmm2
-; SSE-NEXT: movdqa %xmm2, %xmm0
+; SSE-NEXT: shufps {{.*#+}} xmm2 = xmm2[0,2],xmm3[0,2]
+; SSE-NEXT: movaps %xmm2, %xmm0
; SSE-NEXT: retq
;
; AVX1-LABEL: test_cmp_v4f64:
@@ -196,23 +196,18 @@ define <4 x i1> @test_cmp_v4i64(<4 x i64> %a0, <4 x i64> %a1) nounwind {
; SSE2-NEXT: pxor %xmm4, %xmm1
; SSE2-NEXT: movdqa %xmm1, %xmm5
; SSE2-NEXT: pcmpgtd %xmm3, %xmm5
-; SSE2-NEXT: pshufd {{.*#+}} xmm6 = xmm5[0,0,2,2]
-; SSE2-NEXT: pcmpeqd %xmm3, %xmm1
-; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[1,1,3,3]
-; SSE2-NEXT: pand %xmm6, %xmm1
-; SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm5[1,1,3,3]
-; SSE2-NEXT: por %xmm1, %xmm3
; SSE2-NEXT: pxor %xmm4, %xmm2
; SSE2-NEXT: pxor %xmm4, %xmm0
-; SSE2-NEXT: movdqa %xmm0, %xmm1
-; SSE2-NEXT: pcmpgtd %xmm2, %xmm1
-; SSE2-NEXT: pshufd {{.*#+}} xmm4 = xmm1[0,0,2,2]
+; SSE2-NEXT: movdqa %xmm0, %xmm4
+; SSE2-NEXT: pcmpgtd %xmm2, %xmm4
+; SSE2-NEXT: movdqa %xmm4, %xmm6
+; SSE2-NEXT: shufps {{.*#+}} xmm6 = xmm6[0,2],xmm5[0,2]
+; SSE2-NEXT: pcmpeqd %xmm3, %xmm1
; SSE2-NEXT: pcmpeqd %xmm2, %xmm0
-; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm0[1,1,3,3]
-; SSE2-NEXT: pand %xmm4, %xmm2
-; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm1[1,1,3,3]
-; SSE2-NEXT: por %xmm2, %xmm0
-; SSE2-NEXT: packssdw %xmm3, %xmm0
+; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[1,3],xmm1[1,3]
+; SSE2-NEXT: andps %xmm6, %xmm0
+; SSE2-NEXT: shufps {{.*#+}} xmm4 = xmm4[1,3],xmm5[1,3]
+; SSE2-NEXT: orps %xmm4, %xmm0
; SSE2-NEXT: retq
;
; SSE42-LABEL: test_cmp_v4i64:
diff --git a/llvm/test/CodeGen/X86/vector-reduce-or-bool.ll b/llvm/test/CodeGen/X86/vector-reduce-or-bool.ll
index c43c82689634eb..f80544fdef7e60 100644
--- a/llvm/test/CodeGen/X86/vector-reduce-or-bool.ll
+++ b/llvm/test/CodeGen/X86/vector-reduce-or-bool.ll
@@ -861,13 +861,12 @@ define i1 @icmp0_v4i64_v4i1(<4 x i64>) nounwind {
; SSE2: # %bb.0:
; SSE2-NEXT: pxor %xmm2, %xmm2
; SSE2-NEXT: pcmpeqd %xmm2, %xmm1
-; SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm1[1,0,3,2]
-; SSE2-NEXT: pand %xmm1, %xmm3
; SSE2-NEXT: pcmpeqd %xmm2, %xmm0
-; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,0,3,2]
-; SSE2-NEXT: pand %xmm0, %xmm1
-; SSE2-NEXT: packssdw %xmm3, %xmm1
-; SSE2-NEXT: movmskps %xmm1, %eax
+; SSE2-NEXT: movdqa %xmm0, %xmm2
+; SSE2-NEXT: shufps {{.*#+}} xmm2 = xmm2[1,3],xmm1[1,3]
+; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,2],xmm1[0,2]
+; SSE2-NEXT: andps %xmm2, %xmm0
+; SSE2-NEXT: movmskps %xmm0, %eax
; SSE2-NEXT: testl %eax, %eax
; SSE2-NEXT: setne %al
; SSE2-NEXT: ret{{[l|q]}}
@@ -1760,13 +1759,12 @@ define i1 @icmp_v4i64_v4i1(<4 x i64>, <4 x i64>) nounwind {
; X86-SSE2-NEXT: andl $-16, %esp
; X86-SSE2-NEXT: subl $16, %esp
; X86-SSE2-NEXT: pcmpeqd %xmm2, %xmm0
-; X86-SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm0[1,0,3,2]
-; X86-SSE2-NEXT: pand %xmm0, %xmm2
; X86-SSE2-NEXT: pcmpeqd 8(%ebp), %xmm1
-; X86-SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm1[1,0,3,2]
-; X86-SSE2-NEXT: pand %xmm1, %xmm0
-; X86-SSE2-NEXT: packssdw %xmm0, %xmm2
-; X86-SSE2-NEXT: movmskps %xmm2, %eax
+; X86-SSE2-NEXT: movdqa %xmm0, %xmm2
+; X86-SSE2-NEXT: shufps {{.*#+}} xmm2 = xmm2[1,3],xmm1[1,3]
+; X86-SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,2],xmm1[0,2]
+; X86-SSE2-NEXT: andps %xmm2, %xmm0
+; X86-SSE2-NEXT: movmskps %xmm0, %eax
; X86-SSE2-NEXT: testl %eax, %eax
; X86-SSE2-NEXT: setne %al
; X86-SSE2-NEXT: movl %ebp, %esp
@@ -1776,13 +1774,12 @@ define i1 @icmp_v4i64_v4i1(<4 x i64>, <4 x i64>) nounwind {
; X64-SSE2-LABEL: icmp_v4i64_v4i1:
; X64-SSE2: # %bb.0:
; X64-SSE2-NEXT: pcmpeqd %xmm3, %xmm1
-; X64-SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm1[1,0,3,2]
-; X64-SSE2-NEXT: pand %xmm1, %xmm3
; X64-SSE2-NEXT: pcmpeqd %xmm2, %xmm0
-; X64-SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,0,3,2]
-; X64-SSE2-NEXT: pand %xmm0, %xmm1
-; X64-SSE2-NEXT: packssdw %xmm3, %xmm1
-; X64-SSE2-NEXT: movmskps %xmm1, %eax
+; X64-SSE2-NEXT: movdqa %xmm0, %xmm2
+; X64-SSE2-NEXT: shufps {{.*#+}} xmm2 = xmm2[1,3],xmm1[1,3]
+; X64-SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,2],xmm1[0,2]
+; X64-SSE2-NEXT: andps %xmm2, %xmm0
+; X64-SSE2-NEXT: movmskps %xmm0, %eax
; X64-SSE2-NEXT: testl %eax, %eax
; X64-SSE2-NEXT: setne %al
; X64-SSE2-NEXT: retq
diff --git a/llvm/test/CodeGen/X86/vector-reduce-xor-bool.ll b/llvm/test/CodeGen/X86/vector-reduce-xor-bool.ll
index 3e68366ffe7239..300e0ae81e08c4 100644
--- a/llvm/test/CodeGen/X86/vector-reduce-xor-bool.ll
+++ b/llvm/test/CodeGen/X86/vector-reduce-xor-bool.ll
@@ -1209,13 +1209,12 @@ define i1 @icmp0_v4i64_v4i1(<4 x i64>) nounwind {
; SSE2: # %bb.0:
; SSE2-NEXT: pxor %xmm2, %xmm2
; SSE2-NEXT: pcmpeqd %xmm2, %xmm1
-; SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm1[1,0,3,2]
-; SSE2-NEXT: pand %xmm1, %xmm3
; SSE2-NEXT: pcmpeqd %xmm2, %xmm0
-; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,0,3,2]
-; SSE2-NEXT: pand %xmm0, %xmm1
-; SSE2-NEXT: packssdw %xmm3, %xmm1
-; SSE2-NEXT: movmskps %xmm1, %eax
+; SSE2-NEXT: movdqa %xmm0, %xmm2
+; SSE2-NEXT: shufps {{.*#+}} xmm2 = xmm2[1,3],xmm1[1,3]
+; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,2],xmm1[0,2]
+; SSE2-NEXT: andps %xmm2, %xmm0
+; SSE2-NEXT: movmskps %xmm0, %eax
; SSE2-NEXT: testb %al, %al
; SSE2-NEXT: setnp %al
; SSE2-NEXT: ret{{[l|q]}}
@@ -2242,13 +2241,12 @@ define i1 @icmp_v4i64_v4i1(<4 x i64>, <4 x i64>) nounwind {
; X86-SSE2-NEXT: andl $-16, %esp
; X86-SSE2-NEXT: subl $16, %esp
; X86-SSE2-NEXT: pcmpeqd %xmm2, %xmm0
-; X86-SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm0[1,0,3,2]
-; X86-SSE2-NEXT: pand %xmm0, %xmm2
; X86-SSE2-NEXT: pcmpeqd 8(%ebp), %xmm1
-; X86-SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm1[1,0,3,2]
-; X86-SSE2-NEXT: pand %xmm1, %xmm0
-; X86-SSE2-NEXT: packssdw %xmm0, %xmm2
-; X86-SSE2-NEXT: movmskps %xmm2, %eax
+; X86-SSE2-NEXT: movdqa %xmm0, %xmm2
+; X86-SSE2-NEXT: shufps {{.*#+}} xmm2 = xmm2[1,3],xmm1[1,3]
+; X86-SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,2],xmm1[0,2]
+; X86-SSE2-NEXT: andps %xmm2, %xmm0
+; X86-SSE2-NEXT: movmskps %xmm0, %eax
; X86-SSE2-NEXT: testb %al, %al
; X86-SSE2-NEXT: setnp %al
; X86-SSE2-NEXT: movl %ebp, %esp
@@ -2258,13 +2256,12 @@ define i1 @icmp_v4i64_v4i1(<4 x i64>, <4 x i64>) nounwind {
; X64-SSE2-LABEL: icmp_v4i64_v4i1:
; X64-SSE2: # %bb.0:
; X64-SSE2-NEXT: pcmpeqd %xmm3, %xmm1
-; X64-SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm1[1,0,3,2]
-; X64-SSE2-NEXT: pand %xmm1, %xmm3
; X64-SSE2-NEXT: pcmpeqd %xmm2, %xmm0
-; X64-SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,0,3,2]
-; X64-SSE2-NEXT: pand %xmm0, %xmm1
-; X64-SSE2-NEXT: packssdw %xmm3, %xmm1
-; X64-SSE2-NEXT: movmskps %xmm1, %eax
+; X64-SSE2-NEXT: movdqa %xmm0, %xmm2
+; X64-SSE2-NEXT: shufps {{.*#+}} xmm2 = xmm2[1,3],xmm1[1,3]
+; X64-SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,2],xmm1[0,2]
+; X64-SSE2-NEXT: andps %xmm2, %xmm0
+; X64-SSE2-NEXT: movmskps %xmm0, %eax
; X64-SSE2-NEXT: testb %al, %al
; X64-SSE2-NEXT: setnp %al
; X64-SSE2-NEXT: retq
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