[PATCH] D157299: [RISCV] Use vmv.s.x for a constant build_vector when the entire size is less than 32 bits

[Philip Reames via Phabricator via llvm-commits]

reames added inline comments.


================
Comment at: llvm/lib/Target/RISCV/RISCVISelLowering.cpp:3301
+        SplatValue |= ((cast<ConstantSDNode>(SeqV)->getZExtValue() & EltMask)
+                       << (EltIdx * EltBitSize));
+      EltIdx++;
----------------
luke wrote:
> Are EltIdx and Idx the same?
Looks like it.  Will fix.


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D157299/new/

https://reviews.llvm.org/D157299