[llvm] 1b74459 - [RISCV][GlobalISel] Fix tests for addition, subtraction and logical instructions

Nitin John Raj via llvm-commits llvm-commits at lists.llvm.org
Mon Aug 7 10:30:10 PDT 2023


Author: Nitin John Raj
Date: 2023-08-07T10:25:03-07:00
New Revision: 1b74459df8a6d960f7387f0c8379047e42811f58

URL: https://github.com/llvm/llvm-project/commit/1b74459df8a6d960f7387f0c8379047e42811f58
DIFF: https://github.com/llvm/llvm-project/commit/1b74459df8a6d960f7387f0c8379047e42811f58.diff

LOG: [RISCV][GlobalISel] Fix tests for addition, subtraction and logical instructions

Fix a bug introduced in a previous commit.

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D156380

Added: 
    

Modified: 
    llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv32/legalize-add.mir
    llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv32/legalize-and.mir
    llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv32/legalize-or.mir
    llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv32/legalize-sub.mir
    llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv32/legalize-xor.mir
    llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv64/legalize-add.mir
    llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv64/legalize-and.mir
    llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv64/legalize-or.mir
    llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv64/legalize-sub.mir
    llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv64/legalize-xor.mir

Removed: 
    


################################################################################
diff  --git a/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv32/legalize-add.mir b/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv32/legalize-add.mir
index fc89ec885bd34e..a16d0aa6c7f5fb 100644
--- a/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv32/legalize-add.mir
+++ b/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv32/legalize-add.mir
@@ -6,15 +6,16 @@ name:            add_i8
 body:             |
   bb.0.entry:
     ; CHECK-LABEL: name: add_i8
-    ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $x11
-    ; CHECK-NEXT: [[ADD:%[0-9]+]]:_(s32) = G_ADD [[COPY]], [[ADD]]
+    ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
+    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11
+    ; CHECK-NEXT: [[ADD:%[0-9]+]]:_(s32) = G_ADD [[COPY]], [[COPY1]]
     ; CHECK-NEXT: $x10 = COPY [[ADD]](s32)
     ; CHECK-NEXT: PseudoRET implicit $x10
     %0:_(s32) = COPY $x10
     %1:_(s32) = COPY $x11
     %2:_(s8) = G_TRUNC %0(s32)
     %3:_(s8) = G_TRUNC %1(s32)
-    %4:_(s8) = G_ADD %3, %4
+    %4:_(s8) = G_ADD %2, %3
     %5:_(s32) = G_ANYEXT %4(s8)
     $x10 = COPY %5(s32)
     PseudoRET implicit $x10
@@ -25,15 +26,16 @@ name:            add_i16
 body:             |
   bb.0.entry:
     ; CHECK-LABEL: name: add_i16
-    ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $x11
-    ; CHECK-NEXT: [[ADD:%[0-9]+]]:_(s32) = G_ADD [[COPY]], [[ADD]]
+    ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
+    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11
+    ; CHECK-NEXT: [[ADD:%[0-9]+]]:_(s32) = G_ADD [[COPY]], [[COPY1]]
     ; CHECK-NEXT: $x10 = COPY [[ADD]](s32)
     ; CHECK-NEXT: PseudoRET implicit $x10
     %0:_(s32) = COPY $x10
     %1:_(s32) = COPY $x11
     %2:_(s16) = G_TRUNC %0(s32)
     %3:_(s16) = G_TRUNC %1(s32)
-    %4:_(s16) = G_ADD %3, %4
+    %4:_(s16) = G_ADD %2, %3
     %5:_(s32) = G_ANYEXT %4(s16)
     $x10 = COPY %5(s32)
     PseudoRET implicit $x10

diff  --git a/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv32/legalize-and.mir b/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv32/legalize-and.mir
index 08aa7e3b184f08..894a197db9e668 100644
--- a/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv32/legalize-and.mir
+++ b/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv32/legalize-and.mir
@@ -6,15 +6,16 @@ name:            and_i8
 body:             |
   bb.0.entry:
     ; CHECK-LABEL: name: and_i8
-    ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $x11
-    ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY]], [[AND]]
+    ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
+    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11
+    ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY]], [[COPY1]]
     ; CHECK-NEXT: $x10 = COPY [[AND]](s32)
     ; CHECK-NEXT: PseudoRET implicit $x10
     %0:_(s32) = COPY $x10
     %1:_(s32) = COPY $x11
     %2:_(s8) = G_TRUNC %0(s32)
     %3:_(s8) = G_TRUNC %1(s32)
-    %4:_(s8) = G_AND %3, %4
+    %4:_(s8) = G_AND %2, %3
     %5:_(s32) = G_ANYEXT %4(s8)
     $x10 = COPY %5(s32)
     PseudoRET implicit $x10
@@ -25,15 +26,16 @@ name:            and_i16
 body:             |
   bb.0.entry:
     ; CHECK-LABEL: name: and_i16
-    ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $x11
-    ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY]], [[AND]]
+    ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
+    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11
+    ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY]], [[COPY1]]
     ; CHECK-NEXT: $x10 = COPY [[AND]](s32)
     ; CHECK-NEXT: PseudoRET implicit $x10
     %0:_(s32) = COPY $x10
     %1:_(s32) = COPY $x11
     %2:_(s16) = G_TRUNC %0(s32)
     %3:_(s16) = G_TRUNC %1(s32)
-    %4:_(s16) = G_AND %3, %4
+    %4:_(s16) = G_AND %2, %3
     %5:_(s32) = G_ANYEXT %4(s16)
     $x10 = COPY %5(s32)
     PseudoRET implicit $x10

diff  --git a/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv32/legalize-or.mir b/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv32/legalize-or.mir
index 6641d2694ca0f6..ac3ee6b21d81f0 100644
--- a/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv32/legalize-or.mir
+++ b/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv32/legalize-or.mir
@@ -6,15 +6,16 @@ name:            or_i8
 body:             |
   bb.0.entry:
     ; CHECK-LABEL: name: or_i8
-    ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $x11
-    ; CHECK-NEXT: [[OR:%[0-9]+]]:_(s32) = G_OR [[COPY]], [[OR]]
+    ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
+    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11
+    ; CHECK-NEXT: [[OR:%[0-9]+]]:_(s32) = G_OR [[COPY]], [[COPY1]]
     ; CHECK-NEXT: $x10 = COPY [[OR]](s32)
     ; CHECK-NEXT: PseudoRET implicit $x10
     %0:_(s32) = COPY $x10
     %1:_(s32) = COPY $x11
     %2:_(s8) = G_TRUNC %0(s32)
     %3:_(s8) = G_TRUNC %1(s32)
-    %4:_(s8) = G_OR %3, %4
+    %4:_(s8) = G_OR %2, %3
     %5:_(s32) = G_ANYEXT %4(s8)
     $x10 = COPY %5(s32)
     PseudoRET implicit $x10
@@ -25,15 +26,16 @@ name:            or_i16
 body:             |
   bb.0.entry:
     ; CHECK-LABEL: name: or_i16
-    ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $x11
-    ; CHECK-NEXT: [[OR:%[0-9]+]]:_(s32) = G_OR [[COPY]], [[OR]]
+    ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
+    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11
+    ; CHECK-NEXT: [[OR:%[0-9]+]]:_(s32) = G_OR [[COPY]], [[COPY1]]
     ; CHECK-NEXT: $x10 = COPY [[OR]](s32)
     ; CHECK-NEXT: PseudoRET implicit $x10
     %0:_(s32) = COPY $x10
     %1:_(s32) = COPY $x11
     %2:_(s16) = G_TRUNC %0(s32)
     %3:_(s16) = G_TRUNC %1(s32)
-    %4:_(s16) = G_OR %3, %4
+    %4:_(s16) = G_OR %2, %3
     %5:_(s32) = G_ANYEXT %4(s16)
     $x10 = COPY %5(s32)
     PseudoRET implicit $x10
@@ -57,10 +59,10 @@ body:             |
 
 ...
 ---
-name:            and_i64
+name:            or_i64
 body:             |
   bb.0.entry:
-    ; CHECK-LABEL: name: and_i64
+    ; CHECK-LABEL: name: or_i64
     ; CHECK: %hi1:_(s32) = COPY $x10
     ; CHECK-NEXT: %lo1:_(s32) = COPY $x11
     ; CHECK-NEXT: %hi2:_(s32) = COPY $x12
@@ -84,10 +86,10 @@ body:             |
 
 ...
 ---
-name:            and_i96
+name:            or_i96
 body:             |
   bb.0.entry:
-    ; CHECK-LABEL: name: and_i96
+    ; CHECK-LABEL: name: or_i96
     ; CHECK: %hi1:_(s32) = COPY $x10
     ; CHECK-NEXT: %mid1:_(s32) = COPY $x11
     ; CHECK-NEXT: %lo1:_(s32) = COPY $x12

diff  --git a/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv32/legalize-sub.mir b/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv32/legalize-sub.mir
index 52004e44e634fb..424c55ed22dd5c 100644
--- a/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv32/legalize-sub.mir
+++ b/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv32/legalize-sub.mir
@@ -6,15 +6,16 @@ name:            sub_i8
 body:             |
   bb.0.entry:
     ; CHECK-LABEL: name: sub_i8
-    ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $x11
-    ; CHECK-NEXT: [[SUB:%[0-9]+]]:_(s32) = G_SUB [[COPY]], [[SUB]]
+    ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
+    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11
+    ; CHECK-NEXT: [[SUB:%[0-9]+]]:_(s32) = G_SUB [[COPY]], [[COPY1]]
     ; CHECK-NEXT: $x10 = COPY [[SUB]](s32)
     ; CHECK-NEXT: PseudoRET implicit $x10
     %0:_(s32) = COPY $x10
     %1:_(s32) = COPY $x11
     %2:_(s8) = G_TRUNC %0(s32)
     %3:_(s8) = G_TRUNC %1(s32)
-    %4:_(s8) = G_SUB %3, %4
+    %4:_(s8) = G_SUB %2, %3
     %5:_(s32) = G_ANYEXT %4(s8)
     $x10 = COPY %5(s32)
     PseudoRET implicit $x10
@@ -25,15 +26,16 @@ name:            sub_i16
 body:             |
   bb.0.entry:
     ; CHECK-LABEL: name: sub_i16
-    ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $x11
-    ; CHECK-NEXT: [[SUB:%[0-9]+]]:_(s32) = G_SUB [[COPY]], [[SUB]]
+    ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
+    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11
+    ; CHECK-NEXT: [[SUB:%[0-9]+]]:_(s32) = G_SUB [[COPY]], [[COPY1]]
     ; CHECK-NEXT: $x10 = COPY [[SUB]](s32)
     ; CHECK-NEXT: PseudoRET implicit $x10
     %0:_(s32) = COPY $x10
     %1:_(s32) = COPY $x11
     %2:_(s16) = G_TRUNC %0(s32)
     %3:_(s16) = G_TRUNC %1(s32)
-    %4:_(s16) = G_SUB %3, %4
+    %4:_(s16) = G_SUB %2, %3
     %5:_(s32) = G_ANYEXT %4(s16)
     $x10 = COPY %5(s32)
     PseudoRET implicit $x10

diff  --git a/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv32/legalize-xor.mir b/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv32/legalize-xor.mir
index 290ccd10ffdb9c..e0985f3a40e1a0 100644
--- a/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv32/legalize-xor.mir
+++ b/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv32/legalize-xor.mir
@@ -6,15 +6,16 @@ name:            xor_i8
 body:             |
   bb.0.entry:
     ; CHECK-LABEL: name: xor_i8
-    ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $x11
-    ; CHECK-NEXT: [[XOR:%[0-9]+]]:_(s32) = G_XOR [[COPY]], [[XOR]]
+    ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
+    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11
+    ; CHECK-NEXT: [[XOR:%[0-9]+]]:_(s32) = G_XOR [[COPY]], [[COPY1]]
     ; CHECK-NEXT: $x10 = COPY [[XOR]](s32)
     ; CHECK-NEXT: PseudoRET implicit $x10
     %0:_(s32) = COPY $x10
     %1:_(s32) = COPY $x11
     %2:_(s8) = G_TRUNC %0(s32)
     %3:_(s8) = G_TRUNC %1(s32)
-    %4:_(s8) = G_XOR %3, %4
+    %4:_(s8) = G_XOR %2, %3
     %5:_(s32) = G_ANYEXT %4(s8)
     $x10 = COPY %5(s32)
     PseudoRET implicit $x10
@@ -25,15 +26,16 @@ name:            xor_i16
 body:             |
   bb.0.entry:
     ; CHECK-LABEL: name: xor_i16
-    ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $x11
-    ; CHECK-NEXT: [[XOR:%[0-9]+]]:_(s32) = G_XOR [[COPY]], [[XOR]]
+    ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
+    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11
+    ; CHECK-NEXT: [[XOR:%[0-9]+]]:_(s32) = G_XOR [[COPY]], [[COPY1]]
     ; CHECK-NEXT: $x10 = COPY [[XOR]](s32)
     ; CHECK-NEXT: PseudoRET implicit $x10
     %0:_(s32) = COPY $x10
     %1:_(s32) = COPY $x11
     %2:_(s16) = G_TRUNC %0(s32)
     %3:_(s16) = G_TRUNC %1(s32)
-    %4:_(s16) = G_XOR %3, %4
+    %4:_(s16) = G_XOR %2, %3
     %5:_(s32) = G_ANYEXT %4(s16)
     $x10 = COPY %5(s32)
     PseudoRET implicit $x10

diff  --git a/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv64/legalize-add.mir b/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv64/legalize-add.mir
index b96e0ec8ed9842..bdd09e485547a3 100644
--- a/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv64/legalize-add.mir
+++ b/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv64/legalize-add.mir
@@ -6,15 +6,16 @@ name:            add_i8
 body:             |
   bb.0.entry:
     ; CHECK-LABEL: name: add_i8
-    ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x11
-    ; CHECK-NEXT: [[ADD:%[0-9]+]]:_(s64) = G_ADD [[COPY]], [[ADD]]
+    ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
+    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
+    ; CHECK-NEXT: [[ADD:%[0-9]+]]:_(s64) = G_ADD [[COPY]], [[COPY1]]
     ; CHECK-NEXT: $x10 = COPY [[ADD]](s64)
     ; CHECK-NEXT: PseudoRET implicit $x10
     %0:_(s64) = COPY $x10
     %1:_(s64) = COPY $x11
     %2:_(s8) = G_TRUNC %0(s64)
     %3:_(s8) = G_TRUNC %1(s64)
-    %4:_(s8) = G_ADD %3, %4
+    %4:_(s8) = G_ADD %2, %3
     %5:_(s64) = G_ANYEXT %4(s8)
     $x10 = COPY %5(s64)
     PseudoRET implicit $x10
@@ -25,15 +26,16 @@ name:            add_i16
 body:             |
   bb.0.entry:
     ; CHECK-LABEL: name: add_i16
-    ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x11
-    ; CHECK-NEXT: [[ADD:%[0-9]+]]:_(s64) = G_ADD [[COPY]], [[ADD]]
+    ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
+    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
+    ; CHECK-NEXT: [[ADD:%[0-9]+]]:_(s64) = G_ADD [[COPY]], [[COPY1]]
     ; CHECK-NEXT: $x10 = COPY [[ADD]](s64)
     ; CHECK-NEXT: PseudoRET implicit $x10
     %0:_(s64) = COPY $x10
     %1:_(s64) = COPY $x11
     %2:_(s16) = G_TRUNC %0(s64)
     %3:_(s16) = G_TRUNC %1(s64)
-    %4:_(s16) = G_ADD %3, %4
+    %4:_(s16) = G_ADD %2, %3
     %5:_(s64) = G_ANYEXT %4(s16)
     $x10 = COPY %5(s64)
     PseudoRET implicit $x10
@@ -44,15 +46,16 @@ name:            add_i32
 body:             |
   bb.0.entry:
     ; CHECK-LABEL: name: add_i32
-    ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x11
-    ; CHECK-NEXT: [[ADD:%[0-9]+]]:_(s64) = G_ADD [[COPY]], [[ADD]]
+    ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
+    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
+    ; CHECK-NEXT: [[ADD:%[0-9]+]]:_(s64) = G_ADD [[COPY]], [[COPY1]]
     ; CHECK-NEXT: $x10 = COPY [[ADD]](s64)
     ; CHECK-NEXT: PseudoRET implicit $x10
     %0:_(s64) = COPY $x10
     %1:_(s64) = COPY $x11
     %2:_(s32) = G_TRUNC %0(s64)
     %3:_(s32) = G_TRUNC %1(s64)
-    %4:_(s32) = G_ADD %3, %4
+    %4:_(s32) = G_ADD %2, %3
     %5:_(s64) = G_ANYEXT %4(s32)
     $x10 = COPY %5(s64)
     PseudoRET implicit $x10

diff  --git a/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv64/legalize-and.mir b/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv64/legalize-and.mir
index 53c094b2281225..d9603b5a17ba04 100644
--- a/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv64/legalize-and.mir
+++ b/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv64/legalize-and.mir
@@ -6,15 +6,16 @@ name:            and_i8
 body:             |
   bb.0.entry:
     ; CHECK-LABEL: name: and_i8
-    ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x11
-    ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND [[COPY]], [[AND]]
+    ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
+    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
+    ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND [[COPY]], [[COPY1]]
     ; CHECK-NEXT: $x10 = COPY [[AND]](s64)
     ; CHECK-NEXT: PseudoRET implicit $x10
     %0:_(s64) = COPY $x10
     %1:_(s64) = COPY $x11
     %2:_(s8) = G_TRUNC %0(s64)
     %3:_(s8) = G_TRUNC %1(s64)
-    %4:_(s8) = G_AND %3, %4
+    %4:_(s8) = G_AND %2, %3
     %5:_(s64) = G_ANYEXT %4(s8)
     $x10 = COPY %5(s64)
     PseudoRET implicit $x10
@@ -25,15 +26,16 @@ name:            and_i16
 body:             |
   bb.0.entry:
     ; CHECK-LABEL: name: and_i16
-    ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x11
-    ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND [[COPY]], [[AND]]
+    ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
+    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
+    ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND [[COPY]], [[COPY1]]
     ; CHECK-NEXT: $x10 = COPY [[AND]](s64)
     ; CHECK-NEXT: PseudoRET implicit $x10
     %0:_(s64) = COPY $x10
     %1:_(s64) = COPY $x11
     %2:_(s16) = G_TRUNC %0(s64)
     %3:_(s16) = G_TRUNC %1(s64)
-    %4:_(s16) = G_AND %3, %4
+    %4:_(s16) = G_AND %2, %3
     %5:_(s64) = G_ANYEXT %4(s16)
     $x10 = COPY %5(s64)
     PseudoRET implicit $x10
@@ -44,15 +46,16 @@ name:            and_i32
 body:             |
   bb.0.entry:
     ; CHECK-LABEL: name: and_i32
-    ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x11
-    ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND [[COPY]], [[AND]]
+    ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
+    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
+    ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND [[COPY]], [[COPY1]]
     ; CHECK-NEXT: $x10 = COPY [[AND]](s64)
     ; CHECK-NEXT: PseudoRET implicit $x10
     %0:_(s64) = COPY $x10
     %1:_(s64) = COPY $x11
     %2:_(s32) = G_TRUNC %0(s64)
     %3:_(s32) = G_TRUNC %1(s64)
-    %4:_(s32) = G_AND %3, %4
+    %4:_(s32) = G_AND %2, %3
     %5:_(s64) = G_ANYEXT %4(s32)
     $x10 = COPY %5(s64)
     PseudoRET implicit $x10

diff  --git a/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv64/legalize-or.mir b/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv64/legalize-or.mir
index b860c536b2f243..d5100e8025cca1 100644
--- a/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv64/legalize-or.mir
+++ b/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv64/legalize-or.mir
@@ -6,15 +6,16 @@ name:            or_i8
 body:             |
   bb.0.entry:
     ; CHECK-LABEL: name: or_i8
-    ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x11
-    ; CHECK-NEXT: [[OR:%[0-9]+]]:_(s64) = G_OR [[COPY]], [[OR]]
+    ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
+    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
+    ; CHECK-NEXT: [[OR:%[0-9]+]]:_(s64) = G_OR [[COPY]], [[COPY1]]
     ; CHECK-NEXT: $x10 = COPY [[OR]](s64)
     ; CHECK-NEXT: PseudoRET implicit $x10
     %0:_(s64) = COPY $x10
     %1:_(s64) = COPY $x11
     %2:_(s8) = G_TRUNC %0(s64)
     %3:_(s8) = G_TRUNC %1(s64)
-    %4:_(s8) = G_OR %3, %4
+    %4:_(s8) = G_OR %2, %3
     %5:_(s64) = G_ANYEXT %4(s8)
     $x10 = COPY %5(s64)
     PseudoRET implicit $x10
@@ -25,15 +26,16 @@ name:            or_i16
 body:             |
   bb.0.entry:
     ; CHECK-LABEL: name: or_i16
-    ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x11
-    ; CHECK-NEXT: [[OR:%[0-9]+]]:_(s64) = G_OR [[COPY]], [[OR]]
+    ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
+    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
+    ; CHECK-NEXT: [[OR:%[0-9]+]]:_(s64) = G_OR [[COPY]], [[COPY1]]
     ; CHECK-NEXT: $x10 = COPY [[OR]](s64)
     ; CHECK-NEXT: PseudoRET implicit $x10
     %0:_(s64) = COPY $x10
     %1:_(s64) = COPY $x11
     %2:_(s16) = G_TRUNC %0(s64)
     %3:_(s16) = G_TRUNC %1(s64)
-    %4:_(s16) = G_OR %3, %4
+    %4:_(s16) = G_OR %2, %3
     %5:_(s64) = G_ANYEXT %4(s16)
     $x10 = COPY %5(s64)
     PseudoRET implicit $x10
@@ -44,15 +46,16 @@ name:            or_i32
 body:             |
   bb.0.entry:
     ; CHECK-LABEL: name: or_i32
-    ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x11
-    ; CHECK-NEXT: [[OR:%[0-9]+]]:_(s64) = G_OR [[COPY]], [[OR]]
+    ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
+    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
+    ; CHECK-NEXT: [[OR:%[0-9]+]]:_(s64) = G_OR [[COPY]], [[COPY1]]
     ; CHECK-NEXT: $x10 = COPY [[OR]](s64)
     ; CHECK-NEXT: PseudoRET implicit $x10
     %0:_(s64) = COPY $x10
     %1:_(s64) = COPY $x11
     %2:_(s32) = G_TRUNC %0(s64)
     %3:_(s32) = G_TRUNC %1(s64)
-    %4:_(s32) = G_OR %3, %4
+    %4:_(s32) = G_OR %2, %3
     %5:_(s64) = G_ANYEXT %4(s32)
     $x10 = COPY %5(s64)
     PseudoRET implicit $x10

diff  --git a/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv64/legalize-sub.mir b/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv64/legalize-sub.mir
index 010b0b6f8ef880..2eb3f6eb0cbee9 100644
--- a/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv64/legalize-sub.mir
+++ b/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv64/legalize-sub.mir
@@ -6,15 +6,16 @@ name:            sub_i8
 body:             |
   bb.0.entry:
     ; CHECK-LABEL: name: sub_i8
-    ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x11
-    ; CHECK-NEXT: [[SUB:%[0-9]+]]:_(s64) = G_SUB [[COPY]], [[SUB]]
+    ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
+    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
+    ; CHECK-NEXT: [[SUB:%[0-9]+]]:_(s64) = G_SUB [[COPY]], [[COPY1]]
     ; CHECK-NEXT: $x10 = COPY [[SUB]](s64)
     ; CHECK-NEXT: PseudoRET implicit $x10
     %0:_(s64) = COPY $x10
     %1:_(s64) = COPY $x11
     %2:_(s8) = G_TRUNC %0(s64)
     %3:_(s8) = G_TRUNC %1(s64)
-    %4:_(s8) = G_SUB %3, %4
+    %4:_(s8) = G_SUB %2, %3
     %5:_(s64) = G_ANYEXT %4(s8)
     $x10 = COPY %5(s64)
     PseudoRET implicit $x10
@@ -25,15 +26,16 @@ name:            sub_i16
 body:             |
   bb.0.entry:
     ; CHECK-LABEL: name: sub_i16
-    ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x11
-    ; CHECK-NEXT: [[SUB:%[0-9]+]]:_(s64) = G_SUB [[COPY]], [[SUB]]
+    ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
+    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
+    ; CHECK-NEXT: [[SUB:%[0-9]+]]:_(s64) = G_SUB [[COPY]], [[COPY1]]
     ; CHECK-NEXT: $x10 = COPY [[SUB]](s64)
     ; CHECK-NEXT: PseudoRET implicit $x10
     %0:_(s64) = COPY $x10
     %1:_(s64) = COPY $x11
     %2:_(s16) = G_TRUNC %0(s64)
     %3:_(s16) = G_TRUNC %1(s64)
-    %4:_(s16) = G_SUB %3, %4
+    %4:_(s16) = G_SUB %2, %3
     %5:_(s64) = G_ANYEXT %4(s16)
     $x10 = COPY %5(s64)
     PseudoRET implicit $x10
@@ -44,15 +46,16 @@ name:            sub_i32
 body:             |
   bb.0.entry:
     ; CHECK-LABEL: name: sub_i32
-    ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x11
-    ; CHECK-NEXT: [[SUB:%[0-9]+]]:_(s64) = G_SUB [[COPY]], [[SUB]]
+    ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
+    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
+    ; CHECK-NEXT: [[SUB:%[0-9]+]]:_(s64) = G_SUB [[COPY]], [[COPY1]]
     ; CHECK-NEXT: $x10 = COPY [[SUB]](s64)
     ; CHECK-NEXT: PseudoRET implicit $x10
     %0:_(s64) = COPY $x10
     %1:_(s64) = COPY $x11
     %2:_(s32) = G_TRUNC %0(s64)
     %3:_(s32) = G_TRUNC %1(s64)
-    %4:_(s32) = G_SUB %3, %4
+    %4:_(s32) = G_SUB %2, %3
     %5:_(s64) = G_ANYEXT %4(s32)
     $x10 = COPY %5(s64)
     PseudoRET implicit $x10

diff  --git a/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv64/legalize-xor.mir b/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv64/legalize-xor.mir
index 025f1267f6ef8f..12e31e95a53775 100644
--- a/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv64/legalize-xor.mir
+++ b/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv64/legalize-xor.mir
@@ -6,15 +6,16 @@ name:            xor_i8
 body:             |
   bb.0.entry:
     ; CHECK-LABEL: name: xor_i8
-    ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x11
-    ; CHECK-NEXT: [[XOR:%[0-9]+]]:_(s64) = G_XOR [[COPY]], [[XOR]]
+    ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
+    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
+    ; CHECK-NEXT: [[XOR:%[0-9]+]]:_(s64) = G_XOR [[COPY]], [[COPY1]]
     ; CHECK-NEXT: $x10 = COPY [[XOR]](s64)
     ; CHECK-NEXT: PseudoRET implicit $x10
     %0:_(s64) = COPY $x10
     %1:_(s64) = COPY $x11
     %2:_(s8) = G_TRUNC %0(s64)
     %3:_(s8) = G_TRUNC %1(s64)
-    %4:_(s8) = G_XOR %3, %4
+    %4:_(s8) = G_XOR %2, %3
     %5:_(s64) = G_ANYEXT %4(s8)
     $x10 = COPY %5(s64)
     PseudoRET implicit $x10
@@ -25,15 +26,16 @@ name:            xor_i16
 body:             |
   bb.0.entry:
     ; CHECK-LABEL: name: xor_i16
-    ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x11
-    ; CHECK-NEXT: [[XOR:%[0-9]+]]:_(s64) = G_XOR [[COPY]], [[XOR]]
+    ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
+    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
+    ; CHECK-NEXT: [[XOR:%[0-9]+]]:_(s64) = G_XOR [[COPY]], [[COPY1]]
     ; CHECK-NEXT: $x10 = COPY [[XOR]](s64)
     ; CHECK-NEXT: PseudoRET implicit $x10
     %0:_(s64) = COPY $x10
     %1:_(s64) = COPY $x11
     %2:_(s16) = G_TRUNC %0(s64)
     %3:_(s16) = G_TRUNC %1(s64)
-    %4:_(s16) = G_XOR %3, %4
+    %4:_(s16) = G_XOR %2, %3
     %5:_(s64) = G_ANYEXT %4(s16)
     $x10 = COPY %5(s64)
     PseudoRET implicit $x10
@@ -44,15 +46,16 @@ name:            xor_i32
 body:             |
   bb.0.entry:
     ; CHECK-LABEL: name: xor_i32
-    ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x11
-    ; CHECK-NEXT: [[XOR:%[0-9]+]]:_(s64) = G_XOR [[COPY]], [[XOR]]
+    ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
+    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
+    ; CHECK-NEXT: [[XOR:%[0-9]+]]:_(s64) = G_XOR [[COPY]], [[COPY1]]
     ; CHECK-NEXT: $x10 = COPY [[XOR]](s64)
     ; CHECK-NEXT: PseudoRET implicit $x10
     %0:_(s64) = COPY $x10
     %1:_(s64) = COPY $x11
     %2:_(s32) = G_TRUNC %0(s64)
     %3:_(s32) = G_TRUNC %1(s64)
-    %4:_(s32) = G_XOR %3, %4
+    %4:_(s32) = G_XOR %2, %3
     %5:_(s64) = G_ANYEXT %4(s32)
     $x10 = COPY %5(s64)
     PseudoRET implicit $x10


        


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