[PATCH] D157257: [JITLink][PowerPC] Fix relocations in stubs for ppc64 big-endian target

Kai Luo via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Aug 7 01:12:14 PDT 2023


lkail created this revision.
lkail added reviewers: PowerPC, lhames, Esme, shchenz.
Herald added subscribers: kbarton, nemanjai.
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lkail requested review of this revision.
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Offset and addend are fixed for big-endian stubs.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D157257

Files:
  llvm/include/llvm/ExecutionEngine/JITLink/ppc64.h
  llvm/test/ExecutionEngine/JITLink/ppc64/ELF_ppc64_relocations.s


Index: llvm/test/ExecutionEngine/JITLink/ppc64/ELF_ppc64_relocations.s
===================================================================
--- llvm/test/ExecutionEngine/JITLink/ppc64/ELF_ppc64_relocations.s
+++ llvm/test/ExecutionEngine/JITLink/ppc64/ELF_ppc64_relocations.s
@@ -8,7 +8,7 @@
 # RUN:              --check %s %t/elf_reloc.o
 # RUN: llvm-mc --triple=powerpc64-unknown-linux-gnu --filetype=obj -o \
 # RUN:   %t/elf_reloc.o %s
-# RUN: not llvm-jitlink --noexec \
+# RUN: llvm-jitlink --noexec \
 # RUN:              --abs external_data=0xdeadbeef \
 # RUN:              --abs external_func=0xcafef00d \
 # RUN:              --abs external_func_notoc=0x88880000 \
Index: llvm/include/llvm/ExecutionEngine/JITLink/ppc64.h
===================================================================
--- llvm/include/llvm/ExecutionEngine/JITLink/ppc64.h
+++ llvm/include/llvm/ExecutionEngine/JITLink/ppc64.h
@@ -80,25 +80,29 @@
         isLE ? PointerJumpStubContent_little : PointerJumpStubContent_big;
     // Skip save r2.
     Content = Content.slice(4);
+    size_t Offset = isLE ? 0 : 2;
     return PLTCallStubInfo{
         Content,
-        {{TOCDelta16HA, 0, 0}, {TOCDelta16LO, 4, 0}},
+        {{TOCDelta16HA, Offset, 0}, {TOCDelta16LO, Offset + 4, 0}},
     };
   }
   case LongBranchSaveR2: {
     ArrayRef<char> Content =
         isLE ? PointerJumpStubContent_little : PointerJumpStubContent_big;
+    size_t Offset = isLE ? 4 : 6;
     return PLTCallStubInfo{
         Content,
-        {{TOCDelta16HA, 4, 0}, {TOCDelta16LO, 8, 0}},
+        {{TOCDelta16HA, Offset, 0}, {TOCDelta16LO, Offset + 4, 0}},
     };
   }
   case LongBranchNoTOC: {
     ArrayRef<char> Content = isLE ? PointerJumpStubNoTOCContent_little
                                   : PointerJumpStubNoTOCContent_big;
+    size_t Offset = isLE ? 16 : 18;
+    Edge::AddendT Addend = isLE ? 8 : 10;
     return PLTCallStubInfo{
         Content,
-        {{Delta16HA, 16, 8}, {Delta16LO, 20, 12}},
+        {{Delta16HA, Offset, Addend}, {Delta16LO, Offset + 4, Addend + 4}},
     };
   }
   }


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