[PATCH] D150929: [RISCV][BF16] Enable __bf16 for riscv targets

[Craig Topper via Phabricator via llvm-commits]

craig.topper added a comment.

This test crashes

  float foo(__bf16 a, __bf16 b)  {
    return a + b;
  }



  error in backend: Cannot select: t35: f32,ch = load<(dereferenceable load (s16) from %ir.b.addr), anyext from bf16> t49, FrameIndex:i32<1>, undef:i32



================
Comment at: clang/docs/LanguageExtensions.rst:801
   * X86 (when SSE2 is available)
-
+  * RISC-V
 (For X86, SSE2 is available on 64-bit and all recent 32-bit processors.)
----------------
Put this above X86 so that the other X86 comment below stays together.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D150929/new/

https://reviews.llvm.org/D150929