[PATCH] D156171: [AArch64][GlobalISel] G_FMINNUM and G_FMAXNUM vector lowering

Sun Jul 30 07:30:13 PDT 2023

dmgreen added a comment.

In D156171#4531923 <https://reviews.llvm.org/D156171#4531923>, @arsenm wrote:

> In D156171#4531873 <https://reviews.llvm.org/D156171#4531873>, @tschuett wrote:
>
>> May I ask you to add :
>>
>>   ...
>>   ---
>>   name:            3xs32_legal_with_full_fp16
>>   alignment:       4
>>   body:             |
>>     bb.0:
>>       liveins: $h0, $h1
>>       %a:_(<3 x s32>) = IMPLICIT_DEF
>>       %b:_(<3 x s32>) = IMPLICIT_DEF
>>       %minnum:_(<3 x s32>) = G_FMINNUM %a, %b
>>       %c:_(<3 x s32>) = COPY %minnum(<3 x s32>)
>>       RET_ReallyLR implicit %c
>>
>> to llvm/test/CodeGen/AArch64/GlobalISel/legalize-fminnum.mir?
>
> This needs to use G_IMPLICIT_DEF, not IMPLICIT_DEF

I've added a test, but it's a little different. I am not a huge fan of tests with IMPLICIT_DEF/undef as they could just be simplified away in the future, and the <3 x s32> needs to go somewhere legal in order to be valid (I think). It adds a test for the legalization that is currently seen when lowering.

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D156171/new/

https://reviews.llvm.org/D156171