[llvm] 20edd99 - [RISCV] Use RVInstIUnary for THRev_r in RISCVInstrInfoXTHead.td. NFC

[Craig Topper via llvm-commits]

Author: Craig Topper
Date: 2023-07-28T22:48:20-07:00
New Revision: 20edd990fe66ad9de2df1529ec4cabb6933ce716

URL: https://github.com/llvm/llvm-project/commit/20edd990fe66ad9de2df1529ec4cabb6933ce716
DIFF: https://github.com/llvm/llvm-project/commit/20edd990fe66ad9de2df1529ec4cabb6933ce716.diff

LOG: [RISCV] Use RVInstIUnary for THRev_r in RISCVInstrInfoXTHead.td. NFC

Instead of hacking around RVInst4, we can use RVInstIUnary to fill
in all 12 bits of the immediate.

Added: 
    

Modified: 
    llvm/lib/Target/RISCV/RISCVInstrInfoXTHead.td

Removed: 
    


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diff  --git a/llvm/lib/Target/RISCV/RISCVInstrInfoXTHead.td b/llvm/lib/Target/RISCV/RISCVInstrInfoXTHead.td
index b53b9442096b68..7e5ffec1edc64f 100644
--- a/llvm/lib/Target/RISCV/RISCVInstrInfoXTHead.td
+++ b/llvm/lib/Target/RISCV/RISCVInstrInfoXTHead.td
@@ -92,11 +92,8 @@ class THBitfieldExtract_rii<bits<3> funct3, string opcodestr>
 }
 
 class THRev_r<bits<5> funct5, bits<2> funct2, string opcodestr>
-    : RVInstR4<funct2, 0b001, OPC_CUSTOM_0, (outs GPR:$rd), (ins GPR:$rs1),
-               opcodestr, "$rd, $rs1"> {
-  let rs3 = funct5;
-  let rs2 = 0;
-}
+    : RVInstIUnary<{funct5, funct2, 0b00000}, 0b001, OPC_CUSTOM_0,
+                   (outs GPR:$rd), (ins GPR:$rs1), opcodestr, "$rd, $rs1">;
 }
 
 let Predicates = [HasVendorXTHeadBb, IsRV64], DecoderNamespace = "THeadBb",