[llvm] c13e310 - [DAGCombine] Support truncated constants for fptosi.sat combining
Kudryashov Evgeny via llvm-commits
llvm-commits at lists.llvm.org
Fri Jul 28 08:54:54 PDT 2023
Author: Evgenii Kudriashov
Date: 2023-07-28T18:54:39+03:00
New Revision: c13e310fa769a6449291b6a6bfbadc6ddc737eff
URL: https://github.com/llvm/llvm-project/commit/c13e310fa769a6449291b6a6bfbadc6ddc737eff
DIFF: https://github.com/llvm/llvm-project/commit/c13e310fa769a6449291b6a6bfbadc6ddc737eff.diff
LOG: [DAGCombine] Support truncated constants for fptosi.sat combining
Closes https://github.com/llvm/llvm-project/issues/56779
Reviewed By: RKSimon, dmgreen
Differential Revision: https://reviews.llvm.org/D152926
Added:
Modified:
llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
llvm/test/CodeGen/X86/fpclamptosat.ll
Removed:
################################################################################
diff --git a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
index f579d99686eb6d..87ba56137728b3 100644
--- a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
@@ -5459,12 +5459,12 @@ static SDValue isSaturatingMinMax(SDValue N0, SDValue N1, SDValue N2,
if (N0 != N2 && (N2.getOpcode() != ISD::TRUNCATE || N0 != N2.getOperand(0)))
return 0;
// The constants need to be the same or a truncated version of each other.
- ConstantSDNode *N1C = isConstOrConstSplat(N1);
- ConstantSDNode *N3C = isConstOrConstSplat(N3);
+ ConstantSDNode *N1C = isConstOrConstSplat(peekThroughTruncates(N1));
+ ConstantSDNode *N3C = isConstOrConstSplat(peekThroughTruncates(N3));
if (!N1C || !N3C)
return 0;
- const APInt &C1 = N1C->getAPIntValue();
- const APInt &C2 = N3C->getAPIntValue();
+ const APInt &C1 = N1C->getAPIntValue().trunc(N1.getScalarValueSizeInBits());
+ const APInt &C2 = N3C->getAPIntValue().trunc(N3.getScalarValueSizeInBits());
if (C1.getBitWidth() < C2.getBitWidth() || C1 != C2.sext(C1.getBitWidth()))
return 0;
return CC == ISD::SETLT ? ISD::SMIN : (CC == ISD::SETGT ? ISD::SMAX : 0);
diff --git a/llvm/test/CodeGen/X86/fpclamptosat.ll b/llvm/test/CodeGen/X86/fpclamptosat.ll
index a194f669fd5b91..2564e7f974cd8e 100644
--- a/llvm/test/CodeGen/X86/fpclamptosat.ll
+++ b/llvm/test/CodeGen/X86/fpclamptosat.ll
@@ -407,25 +407,16 @@ entry:
; i64 saturate
-; FIXME: Failure to recognise the i128 is in i64 bounds.
define i64 @stest_f64i64(double %x) nounwind {
; CHECK-LABEL: stest_f64i64:
; CHECK: # %bb.0: # %entry
-; CHECK-NEXT: pushq %rax
-; CHECK-NEXT: callq __fixdfti at PLT
-; CHECK-NEXT: xorl %ecx, %ecx
-; CHECK-NEXT: movabsq $9223372036854775807, %rsi # imm = 0x7FFFFFFFFFFFFFFF
-; CHECK-NEXT: cmpq %rsi, %rax
-; CHECK-NEXT: movq %rdx, %rdi
-; CHECK-NEXT: sbbq $0, %rdi
-; CHECK-NEXT: cmovlq %rdx, %rcx
-; CHECK-NEXT: cmovgeq %rsi, %rax
-; CHECK-NEXT: movabsq $-9223372036854775808, %rdx # imm = 0x8000000000000000
-; CHECK-NEXT: cmpq %rax, %rdx
-; CHECK-NEXT: movq $-1, %rsi
-; CHECK-NEXT: sbbq %rcx, %rsi
-; CHECK-NEXT: cmovgeq %rdx, %rax
-; CHECK-NEXT: popq %rcx
+; CHECK-NEXT: cvttsd2si %xmm0, %rax
+; CHECK-NEXT: ucomisd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
+; CHECK-NEXT: movabsq $9223372036854775807, %rcx # imm = 0x7FFFFFFFFFFFFFFF
+; CHECK-NEXT: cmovbeq %rax, %rcx
+; CHECK-NEXT: xorl %eax, %eax
+; CHECK-NEXT: ucomisd %xmm0, %xmm0
+; CHECK-NEXT: cmovnpq %rcx, %rax
; CHECK-NEXT: retq
entry:
%conv = fptosi double %x to i128
@@ -482,25 +473,16 @@ entry:
ret i64 %conv6
}
-; FIXME: Failure to recognise the i128 is in i64 bounds.
define i64 @stest_f32i64(float %x) nounwind {
; CHECK-LABEL: stest_f32i64:
; CHECK: # %bb.0: # %entry
-; CHECK-NEXT: pushq %rax
-; CHECK-NEXT: callq __fixsfti at PLT
-; CHECK-NEXT: xorl %ecx, %ecx
-; CHECK-NEXT: movabsq $9223372036854775807, %rsi # imm = 0x7FFFFFFFFFFFFFFF
-; CHECK-NEXT: cmpq %rsi, %rax
-; CHECK-NEXT: movq %rdx, %rdi
-; CHECK-NEXT: sbbq $0, %rdi
-; CHECK-NEXT: cmovlq %rdx, %rcx
-; CHECK-NEXT: cmovgeq %rsi, %rax
-; CHECK-NEXT: movabsq $-9223372036854775808, %rdx # imm = 0x8000000000000000
-; CHECK-NEXT: cmpq %rax, %rdx
-; CHECK-NEXT: movq $-1, %rsi
-; CHECK-NEXT: sbbq %rcx, %rsi
-; CHECK-NEXT: cmovgeq %rdx, %rax
-; CHECK-NEXT: popq %rcx
+; CHECK-NEXT: cvttss2si %xmm0, %rax
+; CHECK-NEXT: ucomiss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
+; CHECK-NEXT: movabsq $9223372036854775807, %rcx # imm = 0x7FFFFFFFFFFFFFFF
+; CHECK-NEXT: cmovbeq %rax, %rcx
+; CHECK-NEXT: xorl %eax, %eax
+; CHECK-NEXT: ucomiss %xmm0, %xmm0
+; CHECK-NEXT: cmovnpq %rcx, %rax
; CHECK-NEXT: retq
entry:
%conv = fptosi float %x to i128
@@ -557,24 +539,21 @@ entry:
ret i64 %conv6
}
-; FIXME: Failure to recognise the i128 is in i64 bounds.
define i64 @stest_f16i64(half %x) nounwind {
; CHECK-LABEL: stest_f16i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: pushq %rax
-; CHECK-NEXT: callq __fixhfti at PLT
-; CHECK-NEXT: xorl %ecx, %ecx
-; CHECK-NEXT: movabsq $9223372036854775807, %rsi # imm = 0x7FFFFFFFFFFFFFFF
-; CHECK-NEXT: cmpq %rsi, %rax
-; CHECK-NEXT: movq %rdx, %rdi
-; CHECK-NEXT: sbbq $0, %rdi
-; CHECK-NEXT: cmovlq %rdx, %rcx
-; CHECK-NEXT: cmovgeq %rsi, %rax
-; CHECK-NEXT: movabsq $-9223372036854775808, %rdx # imm = 0x8000000000000000
-; CHECK-NEXT: cmpq %rax, %rdx
-; CHECK-NEXT: movq $-1, %rsi
-; CHECK-NEXT: sbbq %rcx, %rsi
-; CHECK-NEXT: cmovgeq %rdx, %rax
+; CHECK-NEXT: callq __extendhfsf2 at PLT
+; CHECK-NEXT: cvttss2si %xmm0, %rax
+; CHECK-NEXT: ucomiss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
+; CHECK-NEXT: movabsq $-9223372036854775808, %rcx # imm = 0x8000000000000000
+; CHECK-NEXT: cmovaeq %rax, %rcx
+; CHECK-NEXT: ucomiss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
+; CHECK-NEXT: movabsq $9223372036854775807, %rdx # imm = 0x7FFFFFFFFFFFFFFF
+; CHECK-NEXT: cmovbeq %rcx, %rdx
+; CHECK-NEXT: xorl %eax, %eax
+; CHECK-NEXT: ucomiss %xmm0, %xmm0
+; CHECK-NEXT: cmovnpq %rdx, %rax
; CHECK-NEXT: popq %rcx
; CHECK-NEXT: retq
entry:
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