[PATCH] D156543: [CSKY][NFC][test] Add more tests of CodeGen for intrinsics
Ben Shi via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Jul 28 07:35:24 PDT 2023
benshi001 updated this revision to Diff 545160.
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D156543/new/
https://reviews.llvm.org/D156543
Files:
llvm/test/CodeGen/CSKY/intrinsic.ll
Index: llvm/test/CodeGen/CSKY/intrinsic.ll
===================================================================
--- llvm/test/CodeGen/CSKY/intrinsic.ll
+++ llvm/test/CodeGen/CSKY/intrinsic.ll
@@ -32,8 +32,19 @@
ret i32 %revb32
}
-define i32 @bitreverse(i32 %x) {
-; CHECK-LABEL: bitreverse:
+define i16 @bswap16(i16 %x) {
+; CHECK-LABEL: bswap16:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: revb16 a0, a0
+; CHECK-NEXT: lsri16 a0, a0, 16
+; CHECK-NEXT: rts16
+entry:
+ %revb16 = call i16 @llvm.bswap.i16(i16 %x)
+ ret i16 %revb16
+}
+
+define i32 @bitreverse_32(i32 %x) {
+; CHECK-LABEL: bitreverse_32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: brev32 a0, a0
; CHECK-NEXT: rts16
@@ -42,7 +53,20 @@
ret i32 %brev32
}
+define i16 @bitreverse_16(i16 %x) {
+; CHECK-LABEL: bitreverse_16:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: brev32 a0, a0
+; CHECK-NEXT: lsri16 a0, a0, 16
+; CHECK-NEXT: rts16
+entry:
+ %brev = call i16 @llvm.bitreverse.i16(i16 %x)
+ ret i16 %brev
+}
+
declare i32 @llvm.bswap.i32(i32)
+declare i16 @llvm.bswap.i16(i16)
declare i32 @llvm.ctlz.i32 (i32, i1)
declare i32 @llvm.cttz.i32 (i32, i1)
declare i32 @llvm.bitreverse.i32(i32)
+declare i16 @llvm.bitreverse.i16(i16)
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