[PATCH] D156345: RegisterCoalescer: Add implicit-def of super register when coalescing SUBREG_TO_REG

[Matt Arsenault via Phabricator via llvm-commits]

arsenm added inline comments.


================
Comment at: llvm/lib/CodeGen/RegisterCoalescer.cpp:1889
+      assert(!MRI->shouldTrackSubRegLiveness(DstReg) &&
+             "this should update subranges");
+      MachineInstrBuilder MIB(*MF, UseMI);
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qcolombet wrote:
> It should be possible to produce a test case that hits this assertion today, no?
> In other words, won't we just miscompile in release mode in these case.
In general, you would have to go out of your way to enable subregister liveness.  Then I would expect a verifier error, and downstream uses to be about as broken as before.

Only AMDGPU, PowerPC, Hexagon RISCV enable it without a cl::opt, none of which use SUBREG_TO_REG. 

PowerPC is potentially problematic, as it does use SUBREG_TO_REG and enables subregister liveness by default (TIL)





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  https://reviews.llvm.org/D156345/new/

https://reviews.llvm.org/D156345