[llvm] bbe2887 - [PhaseOrdering] Add test for GVN/hoist order (NFC)
Nikita Popov via llvm-commits
llvm-commits at lists.llvm.org
Fri Jul 28 06:13:58 PDT 2023
Author: Nikita Popov
Date: 2023-07-28T15:13:51+02:00
New Revision: bbe2887f5e9ca005b0f1b96c858969ee3ba646f4
URL: https://github.com/llvm/llvm-project/commit/bbe2887f5e9ca005b0f1b96c858969ee3ba646f4
DIFF: https://github.com/llvm/llvm-project/commit/bbe2887f5e9ca005b0f1b96c858969ee3ba646f4.diff
LOG: [PhaseOrdering] Add test for GVN/hoist order (NFC)
Based on https://discourse.llvm.org/t/rfc-what-are-the-blockers-to-turning-on-gvnsink-by-default/72326.
Added:
llvm/test/Transforms/PhaseOrdering/gvn-replacement-vs-hoist.ll
Modified:
Removed:
################################################################################
diff --git a/llvm/test/Transforms/PhaseOrdering/gvn-replacement-vs-hoist.ll b/llvm/test/Transforms/PhaseOrdering/gvn-replacement-vs-hoist.ll
new file mode 100644
index 00000000000000..ea863f7355ad9f
--- /dev/null
+++ b/llvm/test/Transforms/PhaseOrdering/gvn-replacement-vs-hoist.ll
@@ -0,0 +1,90 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 2
+; RUN: opt -S -O3 < %s | FileCheck %s
+
+define void @test(ptr noundef %a, i32 noundef %beam) {
+; CHECK-LABEL: define void @test
+; CHECK-SAME: (ptr nocapture noundef writeonly [[A:%.*]], i32 noundef [[BEAM:%.*]]) local_unnamed_addr #[[ATTR0:[0-9]+]] {
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[MUL:%.*]] = shl nuw nsw i32 [[BEAM]], 1
+; CHECK-NEXT: [[IDXPROM:%.*]] = zext i32 [[MUL]] to i64
+; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[A]], i64 [[IDXPROM]]
+; CHECK-NEXT: br label [[FOR_BODY:%.*]]
+; CHECK: for.cond.cleanup:
+; CHECK-NEXT: ret void
+; CHECK: for.body:
+; CHECK-NEXT: [[I_06:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[INC:%.*]], [[FOR_INC:%.*]] ]
+; CHECK-NEXT: [[CMP1:%.*]] = icmp eq i32 [[I_06]], [[BEAM]]
+; CHECK-NEXT: br i1 [[CMP1]], label [[IF_THEN:%.*]], label [[IF_ELSE:%.*]]
+; CHECK: if.then:
+; CHECK-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4
+; CHECK-NEXT: br label [[FOR_INC]]
+; CHECK: if.else:
+; CHECK-NEXT: [[MUL2:%.*]] = shl nuw nsw i32 [[I_06]], 1
+; CHECK-NEXT: [[IDXPROM3:%.*]] = zext i32 [[MUL2]] to i64
+; CHECK-NEXT: [[ARRAYIDX4:%.*]] = getelementptr inbounds i32, ptr [[A]], i64 [[IDXPROM3]]
+; CHECK-NEXT: store i32 1, ptr [[ARRAYIDX4]], align 4
+; CHECK-NEXT: br label [[FOR_INC]]
+; CHECK: for.inc:
+; CHECK-NEXT: [[INC]] = add nuw nsw i32 [[I_06]], 1
+; CHECK-NEXT: [[CMP:%.*]] = icmp ult i32 [[I_06]], 9999
+; CHECK-NEXT: br i1 [[CMP]], label [[FOR_BODY]], label [[FOR_COND_CLEANUP:%.*]]
+;
+entry:
+ %a.addr = alloca ptr, align 8
+ %beam.addr = alloca i32, align 4
+ %i = alloca i32, align 4
+ store ptr %a, ptr %a.addr, align 8
+ store i32 %beam, ptr %beam.addr, align 4
+ call void @llvm.lifetime.start.p0(i64 4, ptr %i)
+ store i32 0, ptr %i, align 4
+ br label %for.cond
+
+for.cond: ; preds = %for.inc, %entry
+ %0 = load i32, ptr %i, align 4
+ %cmp = icmp slt i32 %0, 10000
+ br i1 %cmp, label %for.body, label %for.cond.cleanup
+
+for.cond.cleanup: ; preds = %for.cond
+ call void @llvm.lifetime.end.p0(i64 4, ptr %i)
+ br label %for.end
+
+for.body: ; preds = %for.cond
+ %1 = load i32, ptr %i, align 4
+ %2 = load i32, ptr %beam.addr, align 4
+ %cmp1 = icmp eq i32 %1, %2
+ br i1 %cmp1, label %if.then, label %if.else
+
+if.then: ; preds = %for.body
+ %3 = load ptr, ptr %a.addr, align 8
+ %4 = load i32, ptr %i, align 4
+ %mul = mul nsw i32 2, %4
+ %idxprom = sext i32 %mul to i64
+ %arrayidx = getelementptr inbounds i32, ptr %3, i64 %idxprom
+ store i32 0, ptr %arrayidx, align 4
+ br label %if.end
+
+if.else: ; preds = %for.body
+ %5 = load ptr, ptr %a.addr, align 8
+ %6 = load i32, ptr %i, align 4
+ %mul2 = mul nsw i32 2, %6
+ %idxprom3 = sext i32 %mul2 to i64
+ %arrayidx4 = getelementptr inbounds i32, ptr %5, i64 %idxprom3
+ store i32 1, ptr %arrayidx4, align 4
+ br label %if.end
+
+if.end: ; preds = %if.else, %if.then
+ br label %for.inc
+
+for.inc: ; preds = %if.end
+ %7 = load i32, ptr %i, align 4
+ %inc = add nsw i32 %7, 1
+ store i32 %inc, ptr %i, align 4
+ br label %for.cond
+
+for.end: ; preds = %for.cond.cleanup
+ ret void
+}
+
+declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture)
+
+declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture)
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