[PATCH] D156526: AMDGPU/GlobalISel: Set dead on scc on manually selected instructions

[Matt Arsenault via Phabricator via llvm-commits]

arsenm created this revision.
arsenm added reviewers: AMDGPU, Pierre-vh, Petar.Avramovic, mbrkusanin, aemerson, foad.
Herald added subscribers: StephenFan, kerbowa, hiraditya, tpr, dstuttard, yaxunl, jvesely, kzhuravl.
Herald added a project: All.
arsenm requested review of this revision.
Herald added a subscriber: wdng.
Herald added a project: LLVM.

In SelectionDAG InstrEmitter automatically puts dead flags on unused
physreg defs everywhere. The generated selectors should also set dead
on physreg defs that were not used in the pattern.

      

Leaves handling unused carry out for adde/sube since that case seems
broken to begin with.


https://reviews.llvm.org/D156526

Files:
  llvm/include/llvm/CodeGen/MachineInstrBuilder.h
  llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
  llvm/test/CodeGen/AMDGPU/GlobalISel/fshl.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/fshr.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgpu-atomic-cmpxchg-global.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgpu-wave-address.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-and.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-brcond.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-build-vector-trunc.v2s16.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-constant.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-copy.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fabs.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fneg.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-i1-copy.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-load-constant.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-load-global-saddr.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-or.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-ptr-add.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-ptrmask.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-sext-inreg.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-sext.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-trunc.v2s16.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-xor.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-zext.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/lds-zero-initializer.ll

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