[PATCH] D156404: [RISCV] Use x0 in vsetvli when avl is equal to vlmax.
Jianjian Guan via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Jul 28 01:30:34 PDT 2023
jacquesguan marked 2 inline comments as done.
jacquesguan added inline comments.
================
Comment at: llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp:557
+ if (Subtarget->getRealMinVLen() == Subtarget->getRealMaxVLen()) {
+ const unsigned VLEN = Subtarget->getRealMinVLen();
+ if (VLEN / RISCVVType::getSEWLMULRatio(SEW, VLMul) == C->getZExtValue())
----------------
craig.topper wrote:
> ```
> const unsigned VLEN = Subtarget->getRealMinVLen();
> if (VLEN == Subtarget->getRealMaxVLen()) {
> ```
Done.
================
Comment at: llvm/test/CodeGen/RISCV/rvv/vsetvli-intrinsics.ll:5
; RUN: sed 's/iXLen/i64/g' %s | llc -mtriple=riscv64 -mattr=+v \
-; RUN: -verify-machineinstrs | FileCheck %s
+; RUN: -verify-machineinstrs | FileCheck %s --check-prefixes=CHECK,VLENUNKONWN
+; RUN: sed 's/iXLen/i32/g' %s | llc -mtriple=riscv32 -mattr=+v \
----------------
luke wrote:
> Small typo
Done.
Repository:
rG LLVM Github Monorepo
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https://reviews.llvm.org/D156404/new/
https://reviews.llvm.org/D156404
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