[PATCH] D154488: [PowerPC] Define SchedModel for Power8

Qiu Chaofan via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu Jul 27 19:29:09 PDT 2023


qiucf added a comment.

I'd like to give extra comments on some definitions:

> **2.1.3 Speculative Superscalar Inner Core Organization**
> Out-of-order issue of up to 10 operations into the following 10 issue ports:
>  – Two ports to do loads or fixed-point operations.
>  – Two ports to do stores, fixed-point loads, or fixed-point operations.
>  – Two fixed-point operations
>  – Two issue ports shared by two floating-point, two VSX, two VMX, one crypto, and one DFP operations
>  – One branch operation
>  – One condition register operation
>
> Sixteen execution units:
>  – Two symmetric load/store units (LSU), capable of executing stores, fixed-point loads, and simple fixed-point operations
>  – Two load-only units (LU) also capable of executing simple fixed-point operations
>  – Two symmetric fixed-point units (FXU)
>  – Four floating-point units (FPU), implemented as two 2-way SIMD operations for double- and single-precision. Scalar binary floating-point instructions can only use two FPUs.
>  – Two VMX execution units capable of executing simple FX, permute, complex FX, and 4-way SIMD single-precision floating-point operations
>  – One Crypto unit
>  – One decimal floating-point unit (DFU)
>  – One branch execution unit (BR)
>  – One condition register logical execution unit (CRL)

So correspondent units and ports are defined. But

- For ports, we may need to 'combine' them. For example, port group 1, 2, 3 are all acceptable for fixed-point operations. So we need to create a 'parent' group for fixed-point ops and make group 1, 2, 3 all its children. Similar rule applies for fixed-point loads.
- Some instructions uses 'LSU or FXU', a similar parent-child definition are also needed.

Compared to Power9 model, dispatch rules and pipeline forwarding definition are missing in this patch, because they're vague in Power8 manual.


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