[PATCH] D156485: [PEI] Don't zero out noreg operands
Arthur Eubanks via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Jul 27 14:08:54 PDT 2023
aeubanks updated this revision to Diff 544924.
aeubanks added a comment.
no &
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D156485/new/
https://reviews.llvm.org/D156485
Files:
llvm/lib/CodeGen/PrologEpilogInserter.cpp
llvm/test/CodeGen/X86/zero-call-used-regs.ll
Index: llvm/test/CodeGen/X86/zero-call-used-regs.ll
===================================================================
--- llvm/test/CodeGen/X86/zero-call-used-regs.ll
+++ llvm/test/CodeGen/X86/zero-call-used-regs.ll
@@ -241,6 +241,20 @@
ret i32 %x
}
+define dso_local void @tailcall(ptr %p) local_unnamed_addr #0 "zero-call-used-regs"="used-gpr" {
+; I386-LABEL: tailcall:
+; I386: # %bb.0:
+; I386-NEXT: movl {{[0-9]+}}(%esp), %eax
+; I386-NEXT: jmpl *(%eax) # TAILCALL
+;
+; X86-64-LABEL: tailcall:
+; X86-64: # %bb.0:
+; X86-64-NEXT: jmpq *(%rdi) # TAILCALL
+ %c = load ptr, ptr %p
+ tail call void %c()
+ ret void
+}
+
; Don't emit zeroing registers in "main" function.
define dso_local i32 @main() local_unnamed_addr #1 {
; I386-LABEL: main:
Index: llvm/lib/CodeGen/PrologEpilogInserter.cpp
===================================================================
--- llvm/lib/CodeGen/PrologEpilogInserter.cpp
+++ llvm/lib/CodeGen/PrologEpilogInserter.cpp
@@ -1285,6 +1285,8 @@
continue;
MCRegister Reg = MO.getReg();
+ if (!Reg)
+ continue;
// This picks up sibling registers (e.q. %al -> %ah).
for (MCRegUnit Unit : TRI.regunits(Reg))
@@ -1308,8 +1310,11 @@
if (!MO.isReg())
continue;
- for (const MCPhysReg &Reg :
- TRI.sub_and_superregs_inclusive(MO.getReg()))
+ MCRegister Reg = MO.getReg();
+ if (!Reg)
+ continue;
+
+ for (const MCPhysReg Reg : TRI.sub_and_superregs_inclusive(Reg))
RegsToZero.reset(Reg);
}
}
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