[PATCH] D156103: [AMDGPU][NFC] Add True16 operand definitions.
Joe Nash via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Jul 27 13:54:27 PDT 2023
Joe_Nash added inline comments.
================
Comment at: llvm/lib/Target/AMDGPU/SIRegisterInfo.td:1237
+
+def VSrcT_b16 : RegOrB16T <"VS_16", "OPERAND_REG_IMM"> {
+ let DecoderMethod = "decodeOperand_VSrcT16";
----------------
Please add a comment saying when each of these 4 versions shall be used. I think the intention is:
VSrc_b16 - the current and temporary future default used case for VOP3
VSrcT_b16 - true16 VOP3
VSrcT_b16_Lo128 - true16 VOP1/2/C
VSrcFake16_b16_Lo128 - fake16 VOP1/2/C - the current and temporary future default used case for VOP1/2/C
================
Comment at: llvm/lib/Target/AMDGPU/VOP2Instructions.td:381
def VOP_MADAK_F16 : VOP_MADAK <f16>;
def VOP_MADAK_F16_t16 : VOP_MADAK <f16> {
let IsTrue16 = 1;
----------------
Shall this be renamed to include fake16? I guess a distinct true16 version will be added at a later point.
================
Comment at: llvm/lib/Target/AMDGPU/VOP2Instructions.td:406
def VOP_MADMK_F16 : VOP_MADMK <f16>;
def VOP_MADMK_F16_t16 : VOP_MADMK <f16> {
let IsTrue16 = 1;
----------------
Shall this be renamed to include fake16? I guess a distinct true16 version will be added at a later point.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D156103/new/
https://reviews.llvm.org/D156103
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