[llvm] beabfe7 - [AArch64] Sink splat to fmlal intrinsics

[David Green via llvm-commits]

Author: David Green
Date: 2023-07-27T10:07:01+01:00
New Revision: beabfe747b86e046ee5ce83a06fe4a25d670ba13

URL: https://github.com/llvm/llvm-project/commit/beabfe747b86e046ee5ce83a06fe4a25d670ba13
DIFF: https://github.com/llvm/llvm-project/commit/beabfe747b86e046ee5ce83a06fe4a25d670ba13.diff

LOG: [AArch64] Sink splat to fmlal intrinsics

Similar to other neon index instructions, it is beneficial to sink the splat to
the instruction for fmlal in order for it to create the index.

Added: 
    

Modified: 
    llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
    llvm/test/CodeGen/AArch64/fmlal-loreg.ll

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
index 13df87af6c7b58..05e7ef92833937 100644
--- a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
+++ b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
@@ -14273,6 +14273,16 @@ bool AArch64TargetLowering::shouldSinkOperands(
       if (isSplatShuffle(II->getOperand(1)))
         Ops.push_back(&II->getOperandUse(1));
       return !Ops.empty();
+    case Intrinsic::aarch64_neon_fmlal:
+    case Intrinsic::aarch64_neon_fmlal2:
+    case Intrinsic::aarch64_neon_fmlsl:
+    case Intrinsic::aarch64_neon_fmlsl2:
+      // Sink splats for index lane variants
+      if (isSplatShuffle(II->getOperand(1)))
+        Ops.push_back(&II->getOperandUse(1));
+      if (isSplatShuffle(II->getOperand(2)))
+        Ops.push_back(&II->getOperandUse(2));
+      return !Ops.empty();
     case Intrinsic::aarch64_sve_ptest_first:
     case Intrinsic::aarch64_sve_ptest_last:
       if (auto *IIOp = dyn_cast<IntrinsicInst>(II->getOperand(0)))

diff  --git a/llvm/test/CodeGen/AArch64/fmlal-loreg.ll b/llvm/test/CodeGen/AArch64/fmlal-loreg.ll
index 141b1e9b882616..fc6d4e7431c4d3 100644
--- a/llvm/test/CodeGen/AArch64/fmlal-loreg.ll
+++ b/llvm/test/CodeGen/AArch64/fmlal-loreg.ll
@@ -86,13 +86,12 @@ define void @sink(ptr %out_tile, ptr %lhs_panel, ptr %rhs_panel, i32 noundef %K,
 ; CHECK-NEXT:    movi v1.2d, #0000000000000000
 ; CHECK-NEXT:    mov w8, w3
 ; CHECK-NEXT:    movi v2.2d, #0000000000000000
-; CHECK-NEXT:    dup v0.8h, v0.h[0]
 ; CHECK-NEXT:  .LBB2_1: // %for.body
 ; CHECK-NEXT:    // =>This Inner Loop Header: Depth=1
 ; CHECK-NEXT:    ldr q3, [x2], #2
 ; CHECK-NEXT:    subs x8, x8, #1
-; CHECK-NEXT:    fmlal v1.4s, v3.4h, v0.4h
-; CHECK-NEXT:    fmlal2 v2.4s, v3.4h, v0.4h
+; CHECK-NEXT:    fmlal v1.4s, v3.4h, v0.h[0]
+; CHECK-NEXT:    fmlal2 v2.4s, v3.4h, v0.h[0]
 ; CHECK-NEXT:    b.ne .LBB2_1
 ; CHECK-NEXT:  // %bb.2: // %for.cond.cleanup
 ; CHECK-NEXT:    stp q1, q2, [x0]