[llvm] 474cf4f - [RISCV][GlobalISel] Test legalization of binary logical instructions with wider types
Nitin John Raj via llvm-commits
llvm-commits at lists.llvm.org
Wed Jul 26 15:47:25 PDT 2023
Author: Nitin John Raj
Date: 2023-07-26T15:37:13-07:00
New Revision: 474cf4feb71cee8d8be96b1376febee685478d1a
URL: https://github.com/llvm/llvm-project/commit/474cf4feb71cee8d8be96b1376febee685478d1a
DIFF: https://github.com/llvm/llvm-project/commit/474cf4feb71cee8d8be96b1376febee685478d1a.diff
LOG: [RISCV][GlobalISel] Test legalization of binary logical instructions with wider types
Without any additional tweaking, we can successfully legalize for wider
types (i64, i96 for rv32; i128, i192 for rv64) that are integer
multiples of XLen.
Reviewed By: arsenm, craig.topper
Differential Revision: https://reviews.llvm.org/D155639
Added:
Modified:
llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv32/legalize-and.mir
llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv32/legalize-or.mir
llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv32/legalize-xor.mir
llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv64/legalize-and.mir
llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv64/legalize-or.mir
llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv64/legalize-xor.mir
Removed:
################################################################################
diff --git a/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv32/legalize-and.mir b/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv32/legalize-and.mir
index 7f4c15ed30fb6f..08aa7e3b184f08 100644
--- a/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv32/legalize-and.mir
+++ b/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv32/legalize-and.mir
@@ -56,3 +56,64 @@ body: |
PseudoRET implicit $x10
...
+---
+name: and_i64
+body: |
+ bb.0.entry:
+ ; CHECK-LABEL: name: and_i64
+ ; CHECK: %hi1:_(s32) = COPY $x10
+ ; CHECK-NEXT: %lo1:_(s32) = COPY $x11
+ ; CHECK-NEXT: %hi2:_(s32) = COPY $x12
+ ; CHECK-NEXT: %lo2:_(s32) = COPY $x13
+ ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND %hi1, %hi2
+ ; CHECK-NEXT: [[AND1:%[0-9]+]]:_(s32) = G_AND %lo1, %lo2
+ ; CHECK-NEXT: $x10 = COPY [[AND]](s32)
+ ; CHECK-NEXT: $x11 = COPY [[AND1]](s32)
+ ; CHECK-NEXT: PseudoRET implicit $x10, implicit $x11
+ %hi1:_(s32) = COPY $x10
+ %lo1:_(s32) = COPY $x11
+ %hi2:_(s32) = COPY $x12
+ %lo2:_(s32) = COPY $x13
+ %x1:_(s64) = G_MERGE_VALUES %hi1(s32), %lo1(s32)
+ %x2:_(s64) = G_MERGE_VALUES %hi2(s32), %lo2(s32)
+ %y:_(s64) = G_AND %x1, %x2
+ %hiy:_(s32), %loy:_(s32) = G_UNMERGE_VALUES %y(s64)
+ $x10 = COPY %hiy(s32)
+ $x11 = COPY %loy(s32)
+ PseudoRET implicit $x10, implicit $x11
+
+...
+---
+name: and_i96
+body: |
+ bb.0.entry:
+ ; CHECK-LABEL: name: and_i96
+ ; CHECK: %hi1:_(s32) = COPY $x10
+ ; CHECK-NEXT: %mid1:_(s32) = COPY $x11
+ ; CHECK-NEXT: %lo1:_(s32) = COPY $x12
+ ; CHECK-NEXT: %hi2:_(s32) = COPY $x13
+ ; CHECK-NEXT: %mid2:_(s32) = COPY $x14
+ ; CHECK-NEXT: %lo2:_(s32) = COPY $x15
+ ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND %hi1, %hi2
+ ; CHECK-NEXT: [[AND1:%[0-9]+]]:_(s32) = G_AND %mid1, %mid2
+ ; CHECK-NEXT: [[AND2:%[0-9]+]]:_(s32) = G_AND %lo1, %lo2
+ ; CHECK-NEXT: $x10 = COPY [[AND]](s32)
+ ; CHECK-NEXT: $x11 = COPY [[AND1]](s32)
+ ; CHECK-NEXT: $x12 = COPY [[AND2]](s32)
+ ; CHECK-NEXT: PseudoRET implicit $x10, implicit $x11, implicit $x12
+ %hi1:_(s32) = COPY $x10
+ %mid1:_(s32) = COPY $x11
+ %lo1:_(s32) = COPY $x12
+ %hi2:_(s32) = COPY $x13
+ %mid2:_(s32) = COPY $x14
+ %lo2:_(s32) = COPY $x15
+ %x1:_(s96) = G_MERGE_VALUES %hi1(s32), %mid1(s32), %lo1(s32)
+ %x2:_(s96) = G_MERGE_VALUES %hi2(s32), %mid2(s32), %lo2(s32)
+ %y:_(s96) = G_AND %x1, %x2
+ %hi:_(s32), %mid:_(s32), %lo:_(s32) = G_UNMERGE_VALUES %y(s96)
+ $x10 = COPY %hi(s32)
+ $x11 = COPY %mid(s32)
+ $x12 = COPY %lo(s32)
+ PseudoRET implicit $x10, implicit $x11, implicit $x12
+
+...
diff --git a/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv32/legalize-or.mir b/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv32/legalize-or.mir
index b953fc22c4e0ef..6641d2694ca0f6 100644
--- a/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv32/legalize-or.mir
+++ b/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv32/legalize-or.mir
@@ -56,3 +56,64 @@ body: |
PseudoRET implicit $x10
...
+---
+name: and_i64
+body: |
+ bb.0.entry:
+ ; CHECK-LABEL: name: and_i64
+ ; CHECK: %hi1:_(s32) = COPY $x10
+ ; CHECK-NEXT: %lo1:_(s32) = COPY $x11
+ ; CHECK-NEXT: %hi2:_(s32) = COPY $x12
+ ; CHECK-NEXT: %lo2:_(s32) = COPY $x13
+ ; CHECK-NEXT: [[OR:%[0-9]+]]:_(s32) = G_OR %hi1, %hi2
+ ; CHECK-NEXT: [[OR1:%[0-9]+]]:_(s32) = G_OR %lo1, %lo2
+ ; CHECK-NEXT: $x10 = COPY [[OR]](s32)
+ ; CHECK-NEXT: $x11 = COPY [[OR1]](s32)
+ ; CHECK-NEXT: PseudoRET implicit $x10, implicit $x11
+ %hi1:_(s32) = COPY $x10
+ %lo1:_(s32) = COPY $x11
+ %hi2:_(s32) = COPY $x12
+ %lo2:_(s32) = COPY $x13
+ %x1:_(s64) = G_MERGE_VALUES %hi1(s32), %lo1(s32)
+ %x2:_(s64) = G_MERGE_VALUES %hi2(s32), %lo2(s32)
+ %y:_(s64) = G_OR %x1, %x2
+ %hiy:_(s32), %loy:_(s32) = G_UNMERGE_VALUES %y(s64)
+ $x10 = COPY %hiy(s32)
+ $x11 = COPY %loy(s32)
+ PseudoRET implicit $x10, implicit $x11
+
+...
+---
+name: and_i96
+body: |
+ bb.0.entry:
+ ; CHECK-LABEL: name: and_i96
+ ; CHECK: %hi1:_(s32) = COPY $x10
+ ; CHECK-NEXT: %mid1:_(s32) = COPY $x11
+ ; CHECK-NEXT: %lo1:_(s32) = COPY $x12
+ ; CHECK-NEXT: %hi2:_(s32) = COPY $x13
+ ; CHECK-NEXT: %mid2:_(s32) = COPY $x14
+ ; CHECK-NEXT: %lo2:_(s32) = COPY $x15
+ ; CHECK-NEXT: [[OR:%[0-9]+]]:_(s32) = G_OR %hi1, %hi2
+ ; CHECK-NEXT: [[OR1:%[0-9]+]]:_(s32) = G_OR %mid1, %mid2
+ ; CHECK-NEXT: [[OR2:%[0-9]+]]:_(s32) = G_OR %lo1, %lo2
+ ; CHECK-NEXT: $x10 = COPY [[OR]](s32)
+ ; CHECK-NEXT: $x11 = COPY [[OR1]](s32)
+ ; CHECK-NEXT: $x12 = COPY [[OR2]](s32)
+ ; CHECK-NEXT: PseudoRET implicit $x10, implicit $x11, implicit $x12
+ %hi1:_(s32) = COPY $x10
+ %mid1:_(s32) = COPY $x11
+ %lo1:_(s32) = COPY $x12
+ %hi2:_(s32) = COPY $x13
+ %mid2:_(s32) = COPY $x14
+ %lo2:_(s32) = COPY $x15
+ %x1:_(s96) = G_MERGE_VALUES %hi1(s32), %mid1(s32), %lo1(s32)
+ %x2:_(s96) = G_MERGE_VALUES %hi2(s32), %mid2(s32), %lo2(s32)
+ %y:_(s96) = G_OR %x1, %x2
+ %hi:_(s32), %mid:_(s32), %lo:_(s32) = G_UNMERGE_VALUES %y(s96)
+ $x10 = COPY %hi(s32)
+ $x11 = COPY %mid(s32)
+ $x12 = COPY %lo(s32)
+ PseudoRET implicit $x10, implicit $x11, implicit $x12
+
+...
diff --git a/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv32/legalize-xor.mir b/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv32/legalize-xor.mir
index e6863b7207cad7..290ccd10ffdb9c 100644
--- a/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv32/legalize-xor.mir
+++ b/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv32/legalize-xor.mir
@@ -56,3 +56,64 @@ body: |
PseudoRET implicit $x10
...
+---
+name: xor_i64
+body: |
+ bb.0.entry:
+ ; CHECK-LABEL: name: xor_i64
+ ; CHECK: %hi1:_(s32) = COPY $x10
+ ; CHECK-NEXT: %lo1:_(s32) = COPY $x11
+ ; CHECK-NEXT: %hi2:_(s32) = COPY $x12
+ ; CHECK-NEXT: %lo2:_(s32) = COPY $x13
+ ; CHECK-NEXT: [[XOR:%[0-9]+]]:_(s32) = G_XOR %hi1, %hi2
+ ; CHECK-NEXT: [[XOR1:%[0-9]+]]:_(s32) = G_XOR %lo1, %lo2
+ ; CHECK-NEXT: $x10 = COPY [[XOR]](s32)
+ ; CHECK-NEXT: $x11 = COPY [[XOR1]](s32)
+ ; CHECK-NEXT: PseudoRET implicit $x10, implicit $x11
+ %hi1:_(s32) = COPY $x10
+ %lo1:_(s32) = COPY $x11
+ %hi2:_(s32) = COPY $x12
+ %lo2:_(s32) = COPY $x13
+ %x1:_(s64) = G_MERGE_VALUES %hi1(s32), %lo1(s32)
+ %x2:_(s64) = G_MERGE_VALUES %hi2(s32), %lo2(s32)
+ %y:_(s64) = G_XOR %x1, %x2
+ %hiy:_(s32), %loy:_(s32) = G_UNMERGE_VALUES %y(s64)
+ $x10 = COPY %hiy(s32)
+ $x11 = COPY %loy(s32)
+ PseudoRET implicit $x10, implicit $x11
+
+...
+---
+name: xor_i96
+body: |
+ bb.0.entry:
+ ; CHECK-LABEL: name: xor_i96
+ ; CHECK: %hi1:_(s32) = COPY $x10
+ ; CHECK-NEXT: %mid1:_(s32) = COPY $x11
+ ; CHECK-NEXT: %lo1:_(s32) = COPY $x12
+ ; CHECK-NEXT: %hi2:_(s32) = COPY $x13
+ ; CHECK-NEXT: %mid2:_(s32) = COPY $x14
+ ; CHECK-NEXT: %lo2:_(s32) = COPY $x15
+ ; CHECK-NEXT: [[XOR:%[0-9]+]]:_(s32) = G_XOR %hi1, %hi2
+ ; CHECK-NEXT: [[XOR1:%[0-9]+]]:_(s32) = G_XOR %mid1, %mid2
+ ; CHECK-NEXT: [[XOR2:%[0-9]+]]:_(s32) = G_XOR %lo1, %lo2
+ ; CHECK-NEXT: $x10 = COPY [[XOR]](s32)
+ ; CHECK-NEXT: $x11 = COPY [[XOR1]](s32)
+ ; CHECK-NEXT: $x12 = COPY [[XOR2]](s32)
+ ; CHECK-NEXT: PseudoRET implicit $x10, implicit $x11, implicit $x12
+ %hi1:_(s32) = COPY $x10
+ %mid1:_(s32) = COPY $x11
+ %lo1:_(s32) = COPY $x12
+ %hi2:_(s32) = COPY $x13
+ %mid2:_(s32) = COPY $x14
+ %lo2:_(s32) = COPY $x15
+ %x1:_(s96) = G_MERGE_VALUES %hi1(s32), %mid1(s32), %lo1(s32)
+ %x2:_(s96) = G_MERGE_VALUES %hi2(s32), %mid2(s32), %lo2(s32)
+ %y:_(s96) = G_XOR %x1, %x2
+ %hi:_(s32), %mid:_(s32), %lo:_(s32) = G_UNMERGE_VALUES %y(s96)
+ $x10 = COPY %hi(s32)
+ $x11 = COPY %mid(s32)
+ $x12 = COPY %lo(s32)
+ PseudoRET implicit $x10, implicit $x11, implicit $x12
+
+...
diff --git a/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv64/legalize-and.mir b/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv64/legalize-and.mir
index c04daeb7e1590e..53c094b2281225 100644
--- a/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv64/legalize-and.mir
+++ b/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv64/legalize-and.mir
@@ -75,3 +75,64 @@ body: |
PseudoRET implicit $x10
...
+---
+name: and_i128
+body: |
+ bb.0.entry:
+ ; CHECK-LABEL: name: and_i128
+ ; CHECK: %hi1:_(s64) = COPY $x10
+ ; CHECK-NEXT: %lo1:_(s64) = COPY $x11
+ ; CHECK-NEXT: %hi2:_(s64) = COPY $x12
+ ; CHECK-NEXT: %lo2:_(s64) = COPY $x13
+ ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND %hi1, %hi2
+ ; CHECK-NEXT: [[AND1:%[0-9]+]]:_(s64) = G_AND %lo1, %lo2
+ ; CHECK-NEXT: $x10 = COPY [[AND]](s64)
+ ; CHECK-NEXT: $x11 = COPY [[AND1]](s64)
+ ; CHECK-NEXT: PseudoRET implicit $x10, implicit $x11
+ %hi1:_(s64) = COPY $x10
+ %lo1:_(s64) = COPY $x11
+ %hi2:_(s64) = COPY $x12
+ %lo2:_(s64) = COPY $x13
+ %x1:_(s128) = G_MERGE_VALUES %hi1(s64), %lo1(s64)
+ %x2:_(s128) = G_MERGE_VALUES %hi2(s64), %lo2(s64)
+ %y:_(s128) = G_AND %x1, %x2
+ %hiy:_(s64), %loy:_(s64) = G_UNMERGE_VALUES %y(s128)
+ $x10 = COPY %hiy(s64)
+ $x11 = COPY %loy(s64)
+ PseudoRET implicit $x10, implicit $x11
+
+...
+---
+name: and_i192
+body: |
+ bb.0.entry:
+ ; CHECK-LABEL: name: and_i192
+ ; CHECK: %hi1:_(s64) = COPY $x10
+ ; CHECK-NEXT: %mid1:_(s64) = COPY $x11
+ ; CHECK-NEXT: %lo1:_(s64) = COPY $x12
+ ; CHECK-NEXT: %hi2:_(s64) = COPY $x13
+ ; CHECK-NEXT: %mid2:_(s64) = COPY $x14
+ ; CHECK-NEXT: %lo2:_(s64) = COPY $x15
+ ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND %hi1, %hi2
+ ; CHECK-NEXT: [[AND1:%[0-9]+]]:_(s64) = G_AND %mid1, %mid2
+ ; CHECK-NEXT: [[AND2:%[0-9]+]]:_(s64) = G_AND %lo1, %lo2
+ ; CHECK-NEXT: $x10 = COPY [[AND]](s64)
+ ; CHECK-NEXT: $x11 = COPY [[AND1]](s64)
+ ; CHECK-NEXT: $x12 = COPY [[AND2]](s64)
+ ; CHECK-NEXT: PseudoRET implicit $x10, implicit $x11, implicit $x12
+ %hi1:_(s64) = COPY $x10
+ %mid1:_(s64) = COPY $x11
+ %lo1:_(s64) = COPY $x12
+ %hi2:_(s64) = COPY $x13
+ %mid2:_(s64) = COPY $x14
+ %lo2:_(s64) = COPY $x15
+ %x1:_(s192) = G_MERGE_VALUES %hi1(s64), %mid1(s64), %lo1(s64)
+ %x2:_(s192) = G_MERGE_VALUES %hi2(s64), %mid2(s64), %lo2(s64)
+ %y:_(s192) = G_AND %x1, %x2
+ %hi:_(s64), %mid:_(s64), %lo:_(s64) = G_UNMERGE_VALUES %y(s192)
+ $x10 = COPY %hi(s64)
+ $x11 = COPY %mid(s64)
+ $x12 = COPY %lo(s64)
+ PseudoRET implicit $x10, implicit $x11, implicit $x12
+
+...
diff --git a/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv64/legalize-or.mir b/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv64/legalize-or.mir
index 9a7a234a55687f..b860c536b2f243 100644
--- a/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv64/legalize-or.mir
+++ b/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv64/legalize-or.mir
@@ -75,3 +75,64 @@ body: |
PseudoRET implicit $x10
...
+---
+name: or_i128
+body: |
+ bb.0.entry:
+ ; CHECK-LABEL: name: or_i128
+ ; CHECK: %hi1:_(s64) = COPY $x10
+ ; CHECK-NEXT: %lo1:_(s64) = COPY $x11
+ ; CHECK-NEXT: %hi2:_(s64) = COPY $x12
+ ; CHECK-NEXT: %lo2:_(s64) = COPY $x13
+ ; CHECK-NEXT: [[OR:%[0-9]+]]:_(s64) = G_OR %hi1, %hi2
+ ; CHECK-NEXT: [[OR1:%[0-9]+]]:_(s64) = G_OR %lo1, %lo2
+ ; CHECK-NEXT: $x10 = COPY [[OR]](s64)
+ ; CHECK-NEXT: $x11 = COPY [[OR1]](s64)
+ ; CHECK-NEXT: PseudoRET implicit $x10, implicit $x11
+ %hi1:_(s64) = COPY $x10
+ %lo1:_(s64) = COPY $x11
+ %hi2:_(s64) = COPY $x12
+ %lo2:_(s64) = COPY $x13
+ %x1:_(s128) = G_MERGE_VALUES %hi1(s64), %lo1(s64)
+ %x2:_(s128) = G_MERGE_VALUES %hi2(s64), %lo2(s64)
+ %y:_(s128) = G_OR %x1, %x2
+ %hiy:_(s64), %loy:_(s64) = G_UNMERGE_VALUES %y(s128)
+ $x10 = COPY %hiy(s64)
+ $x11 = COPY %loy(s64)
+ PseudoRET implicit $x10, implicit $x11
+
+...
+---
+name: or_i192
+body: |
+ bb.0.entry:
+ ; CHECK-LABEL: name: or_i192
+ ; CHECK: %hi1:_(s64) = COPY $x10
+ ; CHECK-NEXT: %mid1:_(s64) = COPY $x11
+ ; CHECK-NEXT: %lo1:_(s64) = COPY $x12
+ ; CHECK-NEXT: %hi2:_(s64) = COPY $x13
+ ; CHECK-NEXT: %mid2:_(s64) = COPY $x14
+ ; CHECK-NEXT: %lo2:_(s64) = COPY $x15
+ ; CHECK-NEXT: [[OR:%[0-9]+]]:_(s64) = G_OR %hi1, %hi2
+ ; CHECK-NEXT: [[OR1:%[0-9]+]]:_(s64) = G_OR %mid1, %mid2
+ ; CHECK-NEXT: [[OR2:%[0-9]+]]:_(s64) = G_OR %lo1, %lo2
+ ; CHECK-NEXT: $x10 = COPY [[OR]](s64)
+ ; CHECK-NEXT: $x11 = COPY [[OR1]](s64)
+ ; CHECK-NEXT: $x12 = COPY [[OR2]](s64)
+ ; CHECK-NEXT: PseudoRET implicit $x10, implicit $x11, implicit $x12
+ %hi1:_(s64) = COPY $x10
+ %mid1:_(s64) = COPY $x11
+ %lo1:_(s64) = COPY $x12
+ %hi2:_(s64) = COPY $x13
+ %mid2:_(s64) = COPY $x14
+ %lo2:_(s64) = COPY $x15
+ %x1:_(s192) = G_MERGE_VALUES %hi1(s64), %mid1(s64), %lo1(s64)
+ %x2:_(s192) = G_MERGE_VALUES %hi2(s64), %mid2(s64), %lo2(s64)
+ %y:_(s192) = G_OR %x1, %x2
+ %hi:_(s64), %mid:_(s64), %lo:_(s64) = G_UNMERGE_VALUES %y(s192)
+ $x10 = COPY %hi(s64)
+ $x11 = COPY %mid(s64)
+ $x12 = COPY %lo(s64)
+ PseudoRET implicit $x10, implicit $x11, implicit $x12
+
+...
diff --git a/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv64/legalize-xor.mir b/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv64/legalize-xor.mir
index 461821631dcf00..025f1267f6ef8f 100644
--- a/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv64/legalize-xor.mir
+++ b/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv64/legalize-xor.mir
@@ -75,3 +75,64 @@ body: |
PseudoRET implicit $x10
...
+---
+name: xor_i128
+body: |
+ bb.0.entry:
+ ; CHECK-LABEL: name: xor_i128
+ ; CHECK: %hi1:_(s64) = COPY $x10
+ ; CHECK-NEXT: %lo1:_(s64) = COPY $x11
+ ; CHECK-NEXT: %hi2:_(s64) = COPY $x12
+ ; CHECK-NEXT: %lo2:_(s64) = COPY $x13
+ ; CHECK-NEXT: [[XOR:%[0-9]+]]:_(s64) = G_XOR %hi1, %hi2
+ ; CHECK-NEXT: [[XOR1:%[0-9]+]]:_(s64) = G_XOR %lo1, %lo2
+ ; CHECK-NEXT: $x10 = COPY [[XOR]](s64)
+ ; CHECK-NEXT: $x11 = COPY [[XOR1]](s64)
+ ; CHECK-NEXT: PseudoRET implicit $x10, implicit $x11
+ %hi1:_(s64) = COPY $x10
+ %lo1:_(s64) = COPY $x11
+ %hi2:_(s64) = COPY $x12
+ %lo2:_(s64) = COPY $x13
+ %x1:_(s128) = G_MERGE_VALUES %hi1(s64), %lo1(s64)
+ %x2:_(s128) = G_MERGE_VALUES %hi2(s64), %lo2(s64)
+ %y:_(s128) = G_XOR %x1, %x2
+ %hiy:_(s64), %loy:_(s64) = G_UNMERGE_VALUES %y(s128)
+ $x10 = COPY %hiy(s64)
+ $x11 = COPY %loy(s64)
+ PseudoRET implicit $x10, implicit $x11
+
+...
+---
+name: xor_i192
+body: |
+ bb.0.entry:
+ ; CHECK-LABEL: name: xor_i192
+ ; CHECK: %hi1:_(s64) = COPY $x10
+ ; CHECK-NEXT: %mid1:_(s64) = COPY $x11
+ ; CHECK-NEXT: %lo1:_(s64) = COPY $x12
+ ; CHECK-NEXT: %hi2:_(s64) = COPY $x13
+ ; CHECK-NEXT: %mid2:_(s64) = COPY $x14
+ ; CHECK-NEXT: %lo2:_(s64) = COPY $x15
+ ; CHECK-NEXT: [[XOR:%[0-9]+]]:_(s64) = G_XOR %hi1, %hi2
+ ; CHECK-NEXT: [[XOR1:%[0-9]+]]:_(s64) = G_XOR %mid1, %mid2
+ ; CHECK-NEXT: [[XOR2:%[0-9]+]]:_(s64) = G_XOR %lo1, %lo2
+ ; CHECK-NEXT: $x10 = COPY [[XOR]](s64)
+ ; CHECK-NEXT: $x11 = COPY [[XOR1]](s64)
+ ; CHECK-NEXT: $x12 = COPY [[XOR2]](s64)
+ ; CHECK-NEXT: PseudoRET implicit $x10, implicit $x11, implicit $x12
+ %hi1:_(s64) = COPY $x10
+ %mid1:_(s64) = COPY $x11
+ %lo1:_(s64) = COPY $x12
+ %hi2:_(s64) = COPY $x13
+ %mid2:_(s64) = COPY $x14
+ %lo2:_(s64) = COPY $x15
+ %x1:_(s192) = G_MERGE_VALUES %hi1(s64), %mid1(s64), %lo1(s64)
+ %x2:_(s192) = G_MERGE_VALUES %hi2(s64), %mid2(s64), %lo2(s64)
+ %y:_(s192) = G_XOR %x1, %x2
+ %hi:_(s64), %mid:_(s64), %lo:_(s64) = G_UNMERGE_VALUES %y(s192)
+ $x10 = COPY %hi(s64)
+ $x11 = COPY %mid(s64)
+ $x12 = COPY %lo(s64)
+ PseudoRET implicit $x10, implicit $x11, implicit $x12
+
+...
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