[PATCH] D156358: [AArch64] Do not unnecessarily spill LR because of @llvm.returnaddress

[Eli Friedman via Phabricator via llvm-commits]

efriedma added inline comments.


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Comment at: llvm/lib/Target/AArch64/AArch64ISelLowering.cpp:9729
+    SDValue ReturnAddressCopy = DAG.getCopyFromReg(Chain, DL, TmpReg, VT);
+    St = DAG.getMachineNode(AArch64::XPACI, DL, VT, ReturnAddressCopy);
   } else {
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We normally shouldn't be creating virtual registers here; isel lowering will create copies when necessary.  Maybe this is getting weird because of the use of getMachineNode()?  Normally, we shouldn't be using getMachineNode() during ISelLowering; we should use something like `DAG.getNode(AArch64ISD::XPACI, [...]`, and lower that to the actual instruction during ISelDAGToDAG.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D156358/new/

https://reviews.llvm.org/D156358