[PATCH] D156348: [RISCV] When using vror.vi for left rotate, mask the inverted immediate to SEW.

[Craig Topper via Phabricator via llvm-commits]

craig.topper created this revision.
craig.topper added reviewers: luke, reames, wangpc.
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This makes the assembly more readable.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D156348

Files:
  llvm/lib/Target/RISCV/RISCVInstrInfoZvk.td
  llvm/test/CodeGen/RISCV/rvv/vror-sdnode.ll

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