[PATCH] D156335: [RISCV] Simplify tablegen for XCV mac and mul instructions. NFC.
Craig Topper via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Jul 26 09:28:04 PDT 2023
craig.topper added inline comments.
================
Comment at: llvm/lib/Target/RISCV/RISCVInstrInfoXCV.td:77
-class CVInstMac16I<bits<2> funct2, bits<3> funct3, dag outs, dag ins,
- string opcodestr, string argstr, list<dag> pattern>
- : RVInst<outs, ins, opcodestr, argstr, pattern, InstFormatOther> {
+class CVInst16I<bits<2> funct2, bits<3> funct3, dag outs, dag ins,
+ string opcodestr>
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Can we use `N` or something else instead of `16`? As it is now, it looks very similar to `RVInst16CI` where the 16 refers to the instruction encoding size in bits.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D156335/new/
https://reviews.llvm.org/D156335
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